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[92.184.98.183]) by smtp.gmail.com with ESMTPSA id p63-20020a625b42000000b0053e80618a23sm4699299pfb.34.2022.09.22.10.07.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Sep 2022 10:07:46 -0700 (PDT) Date: Thu, 22 Sep 2022 10:07:46 -0700 (PDT) X-Google-Original-Date: Thu, 22 Sep 2022 10:07:28 PDT (-0700) Subject: Re: [PATCH] cpuidle: riscv-sbi: Fix CPU_PM_CPU_IDLE_ENTER_xyz() macro usage In-Reply-To: CC: rafael@kernel.org, daniel.lezcano@linaro.org, Paul Walmsley , ulf.hansson@linaro.org, atishp@atishpatra.org, Alistair Francis , linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, apatel@ventanamicro.com From: Palmer Dabbelt To: anup@brainfault.org Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On Sun, 28 Aug 2022 19:59:45 PDT (-0700), anup@brainfault.org wrote: > Hi Palmer, > > On Mon, Jul 18, 2022 at 2:16 PM Anup Patel wrote: >> >> Currently, we are using CPU_PM_CPU_IDLE_ENTER_PARAM() for all SBI HSM >> suspend types so retentive suspend types are also treated non-retentive >> and kernel will do redundant additional work for these states. >> >> The BIT[31] of SBI HSM suspend types allows us to differentiate between >> retentive and non-retentive suspend types so we should use this BIT >> to call appropriate CPU_PM_CPU_IDLE_ENTER_xyz() macro. >> >> Fixes: 6abf32f1d9c5 ("cpuidle: Add RISC-V SBI CPU idle driver") >> Signed-off-by: Anup Patel > > Can you please take this patch through the RISC-V tree ? Sorry I missed this, I didn't realize you wanted me to merge it. It's on fixes. > > Regards, > Anup > >> --- >> drivers/cpuidle/cpuidle-riscv-sbi.c | 7 ++++++- >> 1 file changed, 6 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/cpuidle/cpuidle-riscv-sbi.c b/drivers/cpuidle/cpuidle-riscv-sbi.c >> index 1151e5e2ba82..33c92fec4365 100644 >> --- a/drivers/cpuidle/cpuidle-riscv-sbi.c >> +++ b/drivers/cpuidle/cpuidle-riscv-sbi.c >> @@ -97,8 +97,13 @@ static int sbi_cpuidle_enter_state(struct cpuidle_device *dev, >> struct cpuidle_driver *drv, int idx) >> { >> u32 *states = __this_cpu_read(sbi_cpuidle_data.states); >> + u32 state = states[idx]; >> >> - return CPU_PM_CPU_IDLE_ENTER_PARAM(sbi_suspend, idx, states[idx]); >> + if (state & SBI_HSM_SUSP_NON_RET_BIT) >> + return CPU_PM_CPU_IDLE_ENTER_PARAM(sbi_suspend, idx, state); >> + else >> + return CPU_PM_CPU_IDLE_ENTER_RETENTION_PARAM(sbi_suspend, >> + idx, state); >> } >> >> static int __sbi_enter_domain_idle_state(struct cpuidle_device *dev, >> -- >> 2.34.1 >>