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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Hans de Goede <hdegoede@redhat.com>
Cc: "Thierry Reding" <thierry.reding@gmail.com>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	"Len Brown" <lenb@kernel.org>,
	linux-pwm@vger.kernel.org,
	intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel@lists.freedesktop.org,
	"Mika Westerberg" <mika.westerberg@linux.intel.com>,
	linux-acpi@vger.kernel.org
Subject: Re: [PATCH v2 04/15] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare()
Date: Mon, 8 Jun 2020 15:55:42 +0300	[thread overview]
Message-ID: <20200608125542.GM2428291@smile.fi.intel.com> (raw)
In-Reply-To: <c8a8d466-9b4a-9021-ca74-01d315e99117@redhat.com>

On Mon, Jun 08, 2020 at 01:13:01PM +0200, Hans de Goede wrote:
> On 6/8/20 5:55 AM, Andy Shevchenko wrote:
> > On Sun, Jun 07, 2020 at 08:18:29PM +0200, Hans de Goede wrote:
> > > According to the data-sheet the way the PWM controller works is that
> > > each input clock-cycle the base_unit gets added to a N bit counter and
> > > that counter overflowing determines the PWM output frequency.
> > > 
> > > So assuming e.g. a 16 bit counter this means that if base_unit is set to 1,
> > > after 65535 input clock-cycles the counter has been increased from 0 to
> > > 65535 and it will overflow on the next cycle, so it will overflow after
> > > every 65536 clock cycles and thus the calculations done in
> > > pwm_lpss_prepare() should use 65536 and not 65535.
> > > 
> > > This commit fixes this. Note this also aligns the calculations in
> > > pwm_lpss_prepare() with those in pwm_lpss_get_state().
> > 
> > This one sounds like a bug which I have noticed on Broxton (but thought as a
> > hardware issue). In any case it has to be tested on various platforms to see
> > how it affects on them.
> 
> If you like at the datasheet / read my commit description then it
> becomes obvious that because of the way the PWM controller works that
> it takes the full 2^(base-unit-bits) for the counter to overflow,
> not 2^(base-unit-bits) - 1. This will make a difference of a factor
> 65535/65536 in the output frequency which will be tricky to measure.
> 
> IOW I'm not sure we can really test if this helps, but it is
> obviously the right thing to do and it aligns the pwm_apply code
> with the pwm_get_state code which already does not have the - 1.

Yes. It seems I did a mistake in the commit
684309e5043e ("pwm: lpss: Avoid potential overflow of base_unit")
when missed multiplication.

For this one

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

-- 
With Best Regards,
Andy Shevchenko

  reply	other threads:[~2020-06-08 12:55 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-07 18:18 [PATCH v2 00/15] pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API Hans de Goede
2020-06-07 18:18 ` [PATCH v2 01/15] ACPI / LPSS: Resume Cherry Trail PWM controller in no-irq phase Hans de Goede
2020-06-07 18:18 ` [PATCH v2 02/15] ACPI / LPSS: Save Cherry Trail PWM ctx registers only once (at activation) Hans de Goede
2020-06-07 18:18 ` [PATCH v2 03/15] pwm: lpss: Add range limit check for the base_unit register value Hans de Goede
2020-06-08  3:50   ` Andy Shevchenko
2020-06-08 11:07     ` Hans de Goede
2020-06-08 12:51       ` Andy Shevchenko
2020-06-08 14:19         ` Hans de Goede
2020-06-11 22:12       ` Uwe Kleine-König
2020-06-12 11:57         ` Andy Shevchenko
2020-06-13 20:50           ` Uwe Kleine-König
2020-06-07 18:18 ` [PATCH v2 04/15] pwm: lpss: Fix off by one error in base_unit math in pwm_lpss_prepare() Hans de Goede
2020-06-08  3:55   ` Andy Shevchenko
2020-06-08 11:13     ` Hans de Goede
2020-06-08 12:55       ` Andy Shevchenko [this message]
2020-06-07 18:18 ` [PATCH v2 05/15] pwm: lpss: Set SW_UPDATE bit when enabling the PWM Hans de Goede
2020-06-07 18:18 ` [PATCH v2 06/15] pwm: crc: Fix period / duty_cycle times being off by a factor of 256 Hans de Goede
2020-06-09 11:29   ` Andy Shevchenko
2020-06-09 13:45     ` Hans de Goede
2020-06-07 18:18 ` [PATCH v2 07/15] pwm: crc: Fix off-by-one error in the clock-divider calculations Hans de Goede
2020-06-07 18:18 ` [PATCH v2 08/15] pwm: crc: Fix period changes not having any effect Hans de Goede
2020-06-07 18:18 ` [PATCH v2 09/15] pwm: crc: Enable/disable PWM output on enable/disable Hans de Goede
2020-06-09 11:31   ` Andy Shevchenko
2020-06-11 22:20   ` Uwe Kleine-König
2020-06-12 16:59     ` Hans de Goede
2020-06-07 18:18 ` [PATCH v2 10/15] pwm: crc: Implement apply() method to support the new atomic PWM API Hans de Goede
2020-06-09 11:32   ` Andy Shevchenko
2020-06-09 13:44     ` Hans de Goede
2020-06-09 13:50       ` Andy Shevchenko
2020-06-07 18:18 ` [PATCH v2 11/15] pwm: crc: Implement get_state() method Hans de Goede
2020-06-09 11:32   ` Andy Shevchenko
2020-06-11 21:37   ` Uwe Kleine-König
2020-06-12 17:00     ` Hans de Goede
2020-06-07 18:18 ` [PATCH v2 12/15] drm/i915: panel: Add get_vbt_pwm_freq() helper Hans de Goede
2020-06-07 18:18 ` [PATCH v2 13/15] drm/i915: panel: Honor the VBT PWM frequency for devs with an external PWM controller Hans de Goede
2020-06-07 18:18 ` [PATCH v2 14/15] drm/i915: panel: Honor the VBT PWM min setting " Hans de Goede
2020-06-07 18:18 ` [PATCH v2 15/15] drm/i915: panel: Use atomic PWM API " Hans de Goede

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