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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id p5-20020a63c145000000b0051ba9d772f9sm781551pgi.59.2023.04.20.02.35.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Apr 2023 02:35:13 -0700 (PDT) From: Nylon Chen To: aou@eecs.berkeley.edu, conor@kernel.org, emil.renner.berthing@canonical.com, geert+renesas@glider.be, heiko@sntech.de, krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, devicetree@vger.kernel.org, linux-pwm@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: nylon.chen@sifive.com, nylon7717@gmail.com, zong.li@sifive.com, greentime.hu@sifive.com, vincent.chen@sifive.com, Conor Dooley Subject: [PATCH v3 2/2] pwm: sifive: change the PWM controlled LED algorithm Date: Thu, 20 Apr 2023 17:34:57 +0800 Message-Id: <20230420093457.18936-3-nylon.chen@sifive.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230420093457.18936-1-nylon.chen@sifive.com> References: <20230420093457.18936-1-nylon.chen@sifive.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org The `frac` variable represents the pulse inactive time, and the result of this algorithm is the pulse active time. Therefore, we must reverse the result. The reference is SiFive FU740-C000 Manual[0] Link: https://sifive.cdn.prismic.io/sifive/1a82e600-1f93-4f41-b2d8-86ed8b16acba_fu740-c000-manual-v1p6.pdf [0] Acked-by: Conor Dooley Reviewed-by: Conor Dooley Signed-off-by: Nylon Chen Signed-off-by: Vincent Chen --- drivers/pwm/pwm-sifive.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c index 393a4b97fc19..d5d5f36da297 100644 --- a/drivers/pwm/pwm-sifive.c +++ b/drivers/pwm/pwm-sifive.c @@ -132,13 +132,13 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm, { struct pwm_sifive_ddata *ddata = pwm_sifive_chip_to_ddata(chip); struct pwm_state cur_state; - unsigned int duty_cycle; + unsigned int duty_cycle, period; unsigned long long num; bool enabled; int ret = 0; u32 frac; - if (state->polarity != PWM_POLARITY_INVERSED) + if (state->polarity != PWM_POLARITY_NORMAL && state->polarity != PWM_POLARITY_INVERSED) return -EINVAL; cur_state = pwm->state; @@ -154,10 +154,13 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm, * calculating the register values first and then writing them * consecutively */ + period = max(state->period, ddata->approx_period); num = (u64)duty_cycle * (1U << PWM_SIFIVE_CMPWIDTH); frac = DIV64_U64_ROUND_CLOSEST(num, state->period); - /* The hardware cannot generate a 100% duty cycle */ frac = min(frac, (1U << PWM_SIFIVE_CMPWIDTH) - 1); + /* The hardware cannot generate a 100% duty cycle */ + frac = (1U << PWM_SIFIVE_CMPWIDTH) - 1 - frac; + mutex_lock(&ddata->lock); if (state->period != ddata->approx_period) { -- 2.40.0