+ David and Steven,=

Hi Steven,

=C2=A0 =C2=A0 please hel= p to review this patch set.

Thanks

- Kever

Sim= on South <simon@simonsouth.net> =E4=BA=8E2020=E5=B9=B412=E6=9C=8824=E6=97=A5=E5=91=A8=E5=9B=9B =E4= =B8=8A=E5=8D=8812:01=E5=86=99=E9=81=93=EF=BC=9A

Clarify the Rockchip PWM driver's erro= r messages by referring to the clock
that operates a PWM device as the "PWM" clock, rather than the &q= uot;bus"
clock (which is especially misleading in the case of devices that also use<= br> a separate clock for bus access).

Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Simon South <simon@simonsouth.net>
---
=C2=A0drivers/pwm/pwm-rockchip.c | 4 ++--
=C2=A01 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c
index 0c940c7508ea..3b1aa5daafff 100644
--- a/drivers/pwm/pwm-rockchip.c
+++ b/drivers/pwm/pwm-rockchip.c
@@ -309,7 +309,7 @@ static int rockchip_pwm_probe(struct platform_device *p= dev)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 pc->clk =3D devm= _clk_get(&pdev->dev, NULL);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (IS_ERR(pc->c= lk))
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk),
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 "Can't get bus clk\n");
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 "Can't get PWM clk\n");
=C2=A0 =C2=A0 =C2=A0 =C2=A0 }

=C2=A0 =C2=A0 =C2=A0 =C2=A0 count =3D of_count_phandle_with_args(pdev->d= ev.of_node,
@@ -328,7 +328,7 @@ static int rockchip_pwm_probe(struct platform_device *p= dev)

=C2=A0 =C2=A0 =C2=A0 =C2=A0 ret =3D clk_prepare_enable(pc->clk);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (ret) {
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0dev_err(&pdev-&= gt;dev, "Can't prepare enable bus clk: %d\n", ret);
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0dev_err(&pdev-&= gt;dev, "Can't prepare enable PWM clk: %d\n", ret);
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return ret;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 }

--
2.29.2

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