From: "Wei Hu (Xavier)" <xavier.huwei-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
To: dledford-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org
Cc: linux-rdma-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
xavier.huwei-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
lijun_nudt-9Onoh4P/yGk@public.gmane.org,
oulijun-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
charles.chenxin-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
liuyixian-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
xushaobo2-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
zhangxiping3-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
xavier.huwei-9Onoh4P/yGk@public.gmane.org,
linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
Subject: [PATCH for-next 02/20] RDMA/hns: Move priv in order to add multiple hns_roce support
Date: Wed, 30 Aug 2017 17:23:00 +0800 [thread overview]
Message-ID: <1504084998-64397-3-git-send-email-xavier.huwei@huawei.com> (raw)
In-Reply-To: <1504084998-64397-1-git-send-email-xavier.huwei-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Move the data member called priv from hns_roce_hw to hns_roce_dev
structure in order to support multiple hns_roce devices in one
system at the same time. For example, there are two hip06 engines
in the system.
Signed-off-by: Lijun Ou <oulijun-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Signed-off-by: Shaobo Xu <xushaobo2-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
---
drivers/infiniband/hw/hns/hns_roce_device.h | 2 +-
drivers/infiniband/hw/hns/hns_roce_hw_v1.c | 61 ++++++++++++++++-------------
2 files changed, 35 insertions(+), 28 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h
index fc2b82d..aa9281e 100644
--- a/drivers/infiniband/hw/hns/hns_roce_device.h
+++ b/drivers/infiniband/hw/hns/hns_roce_device.h
@@ -535,7 +535,6 @@ struct hns_roce_hw {
int (*poll_cq)(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
int (*dereg_mr)(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr);
int (*destroy_cq)(struct ib_cq *ibcq);
- void *priv;
};
struct hns_roce_dev {
@@ -572,6 +571,7 @@ struct hns_roce_dev {
dma_addr_t tptr_dma_addr; /*only for hw v1*/
u32 tptr_size; /*only for hw v1*/
const struct hns_roce_hw *hw;
+ void *priv;
};
static inline struct hns_roce_dev *to_hr_dev(struct ib_device *ib_dev)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c
index 917d003..e4d13a9 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c
@@ -473,7 +473,7 @@ static void hns_roce_set_sdb_ext(struct hns_roce_dev *hr_dev, u32 ext_sdb_alept,
dma_addr_t sdb_dma_addr;
u32 val;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
db = &priv->db_table;
/* Configure extend SDB threshold */
@@ -512,7 +512,7 @@ static void hns_roce_set_odb_ext(struct hns_roce_dev *hr_dev, u32 ext_odb_alept,
dma_addr_t odb_dma_addr;
u32 val;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
db = &priv->db_table;
/* Configure extend ODB threshold */
@@ -548,7 +548,7 @@ static int hns_roce_db_ext_init(struct hns_roce_dev *hr_dev, u32 sdb_ext_mod,
dma_addr_t odb_dma_addr;
int ret = 0;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
db = &priv->db_table;
db->ext_db = kmalloc(sizeof(*db->ext_db), GFP_KERNEL);
@@ -669,7 +669,7 @@ static int hns_roce_v1_rsv_lp_qp(struct hns_roce_dev *hr_dev)
u8 port = 0;
u8 sl;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
free_mr = &priv->free_mr;
/* Reserved cq for loop qp */
@@ -817,7 +817,7 @@ static void hns_roce_v1_release_lp_qp(struct hns_roce_dev *hr_dev)
int ret;
int i;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
free_mr = &priv->free_mr;
for (i = 0; i < HNS_ROCE_V1_RESV_QP; i++) {
@@ -851,7 +851,7 @@ static int hns_roce_db_init(struct hns_roce_dev *hr_dev)
u32 odb_evt_mod;
int ret = 0;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
db = &priv->db_table;
memset(db, 0, sizeof(*db));
@@ -907,7 +907,7 @@ static int hns_roce_v1_recreate_lp_qp(struct hns_roce_dev *hr_dev)
unsigned long end =
msecs_to_jiffies(HNS_ROCE_V1_RECREATE_LP_QP_TIMEOUT_MSECS) + jiffies;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
free_mr = &priv->free_mr;
lp_qp_work = kzalloc(sizeof(struct hns_roce_recreate_lp_qp_work),
@@ -983,7 +983,7 @@ static void hns_roce_v1_mr_free_work_fn(struct work_struct *work)
hr_dev = to_hr_dev(mr_work->ib_dev);
dev = &hr_dev->pdev->dev;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
free_mr = &priv->free_mr;
mr_free_cq = free_mr->mr_free_cq;
@@ -1039,7 +1039,7 @@ int hns_roce_v1_dereg_mr(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr)
int npages;
int ret = 0;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
free_mr = &priv->free_mr;
if (mr->enabled) {
@@ -1104,7 +1104,7 @@ static void hns_roce_db_free(struct hns_roce_dev *hr_dev)
struct hns_roce_v1_priv *priv;
struct hns_roce_db_table *db;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
db = &priv->db_table;
if (db->sdb_ext_mod) {
@@ -1134,7 +1134,7 @@ static int hns_roce_raq_init(struct hns_roce_dev *hr_dev)
struct hns_roce_raq_table *raq;
struct device *dev = &hr_dev->pdev->dev;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
raq = &priv->raq_table;
raq->e_raq_buf = kzalloc(sizeof(*(raq->e_raq_buf)), GFP_KERNEL);
@@ -1211,7 +1211,7 @@ static void hns_roce_raq_free(struct hns_roce_dev *hr_dev)
struct hns_roce_v1_priv *priv;
struct hns_roce_raq_table *raq;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
raq = &priv->raq_table;
dma_free_coherent(dev, HNS_ROCE_V1_RAQ_SIZE, raq->e_raq_buf->buf,
@@ -1245,7 +1245,7 @@ static int hns_roce_bt_init(struct hns_roce_dev *hr_dev)
struct hns_roce_v1_priv *priv;
int ret;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
priv->bt_table.qpc_buf.buf = dma_alloc_coherent(dev,
HNS_ROCE_BT_RSV_BUF_SIZE, &priv->bt_table.qpc_buf.map,
@@ -1287,7 +1287,7 @@ static void hns_roce_bt_free(struct hns_roce_dev *hr_dev)
struct device *dev = &hr_dev->pdev->dev;
struct hns_roce_v1_priv *priv;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
dma_free_coherent(dev, HNS_ROCE_BT_RSV_BUF_SIZE,
priv->bt_table.cqc_buf.buf, priv->bt_table.cqc_buf.map);
@@ -1305,7 +1305,7 @@ static int hns_roce_tptr_init(struct hns_roce_dev *hr_dev)
struct hns_roce_buf_list *tptr_buf;
struct hns_roce_v1_priv *priv;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
tptr_buf = &priv->tptr_table.tptr_buf;
/*
@@ -1331,7 +1331,7 @@ static void hns_roce_tptr_free(struct hns_roce_dev *hr_dev)
struct hns_roce_buf_list *tptr_buf;
struct hns_roce_v1_priv *priv;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
tptr_buf = &priv->tptr_table.tptr_buf;
dma_free_coherent(dev, HNS_ROCE_V1_TPTR_BUF_SIZE,
@@ -1345,7 +1345,7 @@ static int hns_roce_free_mr_init(struct hns_roce_dev *hr_dev)
struct hns_roce_v1_priv *priv;
int ret = 0;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
free_mr = &priv->free_mr;
free_mr->free_mr_wq = create_singlethread_workqueue("hns_roce_free_mr");
@@ -1369,7 +1369,7 @@ static void hns_roce_free_mr_free(struct hns_roce_dev *hr_dev)
struct hns_roce_free_mr *free_mr;
struct hns_roce_v1_priv *priv;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
free_mr = &priv->free_mr;
flush_workqueue(free_mr->free_mr_wq);
@@ -1433,7 +1433,7 @@ static int hns_roce_des_qp_init(struct hns_roce_dev *hr_dev)
struct hns_roce_v1_priv *priv;
struct hns_roce_des_qp *des_qp;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
des_qp = &priv->des_qp;
des_qp->requeue_flag = 1;
@@ -1451,7 +1451,7 @@ static void hns_roce_des_qp_free(struct hns_roce_dev *hr_dev)
struct hns_roce_v1_priv *priv;
struct hns_roce_des_qp *des_qp;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
des_qp = &priv->des_qp;
des_qp->requeue_flag = 0;
@@ -1942,7 +1942,7 @@ void hns_roce_v1_write_cqc(struct hns_roce_dev *hr_dev,
dma_addr_t tptr_dma_addr;
int offset;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
tptr_buf = &priv->tptr_table.tptr_buf;
cq_context = mb_buf;
@@ -2290,7 +2290,7 @@ int hns_roce_v1_clear_hem(struct hns_roce_dev *hr_dev,
void __iomem *bt_cmd;
u64 bt_ba = 0;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
switch (table->type) {
case HEM_TYPE_QPC:
@@ -3665,7 +3665,7 @@ static void hns_roce_v1_destroy_qp_work_fn(struct work_struct *work)
qp_work_entry = container_of(work, struct hns_roce_qp_work, work);
hr_dev = to_hr_dev(qp_work_entry->ib_dev);
dev = &hr_dev->pdev->dev;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
hr_qp = qp_work_entry->qp;
qpn = hr_qp->qpn;
@@ -3782,7 +3782,7 @@ int hns_roce_v1_destroy_qp(struct ib_qp *ibqp)
qp_work->sdb_inv_cnt = qp_work_entry.sdb_inv_cnt;
qp_work->sche_cnt = qp_work_entry.sche_cnt;
- priv = (struct hns_roce_v1_priv *)hr_dev->hw->priv;
+ priv = (struct hns_roce_v1_priv *)hr_dev->priv;
queue_work(priv->des_qp.qp_wq, &qp_work->work);
dev_dbg(dev, "Begin destroy QP(0x%lx) work.\n", hr_qp->qpn);
}
@@ -3842,8 +3842,6 @@ int hns_roce_v1_destroy_cq(struct ib_cq *ibcq)
return ret;
}
-struct hns_roce_v1_priv hr_v1_priv;
-
static const struct hns_roce_hw hns_roce_hw_v1 = {
.reset = hns_roce_v1_reset,
.hw_profile = hns_roce_v1_profile,
@@ -3864,7 +3862,6 @@ int hns_roce_v1_destroy_cq(struct ib_cq *ibcq)
.poll_cq = hns_roce_v1_poll_cq,
.dereg_mr = hns_roce_v1_dereg_mr,
.destroy_cq = hns_roce_v1_destroy_cq,
- .priv = &hr_v1_priv,
};
static const struct of_device_id hns_roce_of_match[] = {
@@ -4046,6 +4043,12 @@ static int hns_roce_probe(struct platform_device *pdev)
if (!hr_dev)
return -ENOMEM;
+ hr_dev->priv = kzalloc(sizeof(struct hns_roce_v1_priv), GFP_KERNEL);
+ if (!hr_dev->priv) {
+ ret = -ENOMEM;
+ goto error_failed_kzalloc;
+ }
+
hr_dev->pdev = pdev;
platform_set_drvdata(pdev, hr_dev);
@@ -4071,6 +4074,9 @@ static int hns_roce_probe(struct platform_device *pdev)
return 0;
error_failed_get_cfg:
+ kfree(hr_dev->priv);
+
+error_failed_kzalloc:
ib_dealloc_device(&hr_dev->ib_dev);
return ret;
@@ -4085,6 +4091,7 @@ static int hns_roce_remove(struct platform_device *pdev)
struct hns_roce_dev *hr_dev = platform_get_drvdata(pdev);
hns_roce_exit(hr_dev);
+ kfree(hr_dev->priv);
ib_dealloc_device(&hr_dev->ib_dev);
return 0;
--
1.9.1
--
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next prev parent reply other threads:[~2017-08-30 9:23 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-30 9:22 [PATCH for-next 00/20] RDMA/hns: Add hip08 RoCE driver support Wei Hu (Xavier)
[not found] ` <1504084998-64397-1-git-send-email-xavier.huwei-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-08-30 9:22 ` [PATCH for-next 01/20] RDMA/hns: Split hw v1 driver from hns roce driver Wei Hu (Xavier)
2017-08-30 9:23 ` Wei Hu (Xavier) [this message]
2017-08-30 9:23 ` [PATCH for-next 03/20] RDMA/hns: Initialize the PCI device for hip08 RoCE Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 04/20] RDMA/hns: Modify assignment device variable to support both PCI device and platform device Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 05/20] RDMA/hns: Add command queue support for hip08 RoCE driver Wei Hu (Xavier)
[not found] ` <1504084998-64397-6-git-send-email-xavier.huwei-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-25 17:06 ` Doug Ledford
[not found] ` <1506359213.120853.75.camel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2017-09-25 17:18 ` Leon Romanovsky
[not found] ` <20170925171821.GQ25094-U/DQcQFIOTAAJjI8aNfphQ@public.gmane.org>
2017-09-25 17:36 ` Doug Ledford
[not found] ` <1506361015.120853.81.camel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2017-09-26 5:15 ` Leon Romanovsky
2017-09-26 13:13 ` Wei Hu (Xavier)
[not found] ` <59CA5261.80209-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-26 15:24 ` Wei Hu (Xavier)
[not found] ` <e99f8917-1906-697b-3dcd-5f024b444750-WVlzvzqoTvw@public.gmane.org>
2017-09-26 15:51 ` Leon Romanovsky
[not found] ` <20170926155149.GE6816-U/DQcQFIOTAAJjI8aNfphQ@public.gmane.org>
2017-09-26 16:13 ` Wei Hu (Xavier)
[not found] ` <5514bf6d-3a98-a6fe-ea90-476f5ae1f623-WVlzvzqoTvw@public.gmane.org>
2017-09-26 21:12 ` Wei Hu (Xavier)
2017-09-26 16:18 ` Doug Ledford
[not found] ` <81dd332d-e060-d7e3-bec9-1791511c5470-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2017-09-27 2:46 ` Wei Hu (Xavier)
[not found] ` <9172f8c5-3dd6-a573-8e28-1b3ae4b1726b-WVlzvzqoTvw@public.gmane.org>
2017-09-27 12:21 ` Doug Ledford
[not found] ` <1b8bda3b-c514-7e46-08bf-3ea50ea68096-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2017-09-27 12:41 ` Doug Ledford
2017-09-28 4:34 ` Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 06/20] RDMA/hns: Add profile support for hip08 driver Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 07/20] RDMA/hns: Add mailbox's implementation for hip08 RoCE driver Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 08/20] RDMA/hns: Add the interfaces to support multi hop addressing for the contexts in hip08 Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 09/20] RDMA/hns: Configure BT BA and BT attribute " Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 10/20] RDMA/hns: Update the interfaces for MTT/CQE multi hop addressing " Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 11/20] RDMA/hns: Split CQE from MTT " Wei Hu (Xavier)
[not found] ` <1504084998-64397-12-git-send-email-xavier.huwei-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-13 17:52 ` Leon Romanovsky
[not found] ` <20170913175259.GW3405-U/DQcQFIOTAAJjI8aNfphQ@public.gmane.org>
2017-09-15 1:09 ` Wei Hu (Xavier)
[not found] ` <59BB2848.6080802-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-20 2:48 ` Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 12/20] RDMA/hns: Support multi hop addressing for PBL " Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 13/20] RDMA/hns: Configure mac&gid and user access region for hip08 RoCE driver Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 14/20] RDMA/hns: Add CQ operations support " Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 15/20] RDMA/hns: Add QP operations support for hip08 SoC Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 16/20] RDMA/hns: Add support for processing send wr and receive wr Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 17/20] RDMA/hns: Configure the MTPT in hip08 Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 18/20] RDMA/hns: Add releasing resource operation in error branch Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 19/20] RDMA/hns: Replace condition statement using hardware version information Wei Hu (Xavier)
2017-08-30 9:23 ` [PATCH for-next 20/20] RDMA/hns: Fix inconsistent warning Wei Hu (Xavier)
2017-09-13 17:55 ` [PATCH for-next 00/20] RDMA/hns: Add hip08 RoCE driver support Leon Romanovsky
[not found] ` <20170913175554.GX3405-U/DQcQFIOTAAJjI8aNfphQ@public.gmane.org>
2017-09-14 7:45 ` Wei Hu (Xavier)
[not found] ` <59BA33B1.8030300-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-14 12:43 ` Leon Romanovsky
[not found] ` <20170914124341.GY3405-U/DQcQFIOTAAJjI8aNfphQ@public.gmane.org>
2017-09-15 1:12 ` Wei Hu (Xavier)
[not found] ` <59BB28F1.9040007-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-20 2:50 ` Wei Hu (Xavier)
2017-09-25 6:18 ` Wei Hu (Xavier)
[not found] ` <59C89FD0.9050606-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-25 15:57 ` Doug Ledford
[not found] ` <1506355051.120853.70.camel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2017-09-25 17:37 ` Doug Ledford
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