* [PATCH mlx5-next 1/3] net/mlx5: Avoid RDMA file inclusion in core driver
@ 2020-06-26 5:59 Saeed Mahameed
2020-06-26 5:59 ` [PATCH mlx5-next 2/3] net/mlx5: Avoid eswitch header inclusion in fs core layer Saeed Mahameed
2020-06-26 5:59 ` [PATCH mlx5-next 3/3] net/mlx5: kTLS, Improve TLS params layout structures Saeed Mahameed
0 siblings, 2 replies; 3+ messages in thread
From: Saeed Mahameed @ 2020-06-26 5:59 UTC (permalink / raw)
To: Saeed Mahameed, Leon Romanovsky; +Cc: netdev, linux-rdma, Parav Pandit
From: Parav Pandit <parav@mellanox.com>
mlx5 cq.h does not depend on RDMA verbs.
Remove RDMA verbs file inclusion.
Signed-off-by: Parav Pandit <parav@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
---
include/linux/mlx5/cq.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/linux/mlx5/cq.h b/include/linux/mlx5/cq.h
index b5a9399e07ee..7bfb67363434 100644
--- a/include/linux/mlx5/cq.h
+++ b/include/linux/mlx5/cq.h
@@ -33,7 +33,6 @@
#ifndef MLX5_CORE_CQ_H
#define MLX5_CORE_CQ_H
-#include <rdma/ib_verbs.h>
#include <linux/mlx5/driver.h>
#include <linux/refcount.h>
--
2.26.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH mlx5-next 2/3] net/mlx5: Avoid eswitch header inclusion in fs core layer
2020-06-26 5:59 [PATCH mlx5-next 1/3] net/mlx5: Avoid RDMA file inclusion in core driver Saeed Mahameed
@ 2020-06-26 5:59 ` Saeed Mahameed
2020-06-26 5:59 ` [PATCH mlx5-next 3/3] net/mlx5: kTLS, Improve TLS params layout structures Saeed Mahameed
1 sibling, 0 replies; 3+ messages in thread
From: Saeed Mahameed @ 2020-06-26 5:59 UTC (permalink / raw)
To: Saeed Mahameed, Leon Romanovsky; +Cc: netdev, linux-rdma, Parav Pandit
From: Parav Pandit <parav@mellanox.com>
Flow steering core layer is independent of the eswitch layer.
Hence avoid fs_core dependency on eswitch.
Fixes: 328edb499f99 ("net/mlx5: Split FDB fast path prio to multiple namespaces")
Signed-off-by: Parav Pandit <parav@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
---
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h | 10 ----------
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c | 1 -
drivers/net/ethernet/mellanox/mlx5/core/fs_core.h | 10 ++++++++++
3 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
index a5175e98c0b3..bb309b2f77f2 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
@@ -44,16 +44,6 @@
#include "lib/mpfs.h"
#include "en/tc_ct.h"
-#define FDB_TC_MAX_CHAIN 3
-#define FDB_FT_CHAIN (FDB_TC_MAX_CHAIN + 1)
-#define FDB_TC_SLOW_PATH_CHAIN (FDB_FT_CHAIN + 1)
-
-/* The index of the last real chain (FT) + 1 as chain zero is valid as well */
-#define FDB_NUM_CHAINS (FDB_FT_CHAIN + 1)
-
-#define FDB_TC_MAX_PRIO 16
-#define FDB_TC_LEVELS_PER_PRIO 2
-
#ifdef CONFIG_MLX5_ESWITCH
#define ESW_OFFLOADS_DEFAULT_NUM_GROUPS 15
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
index 13e2fb79c21a..e47a66983935 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
@@ -41,7 +41,6 @@
#include "diag/fs_tracepoint.h"
#include "accel/ipsec.h"
#include "fpga/ipsec.h"
-#include "eswitch.h"
#define INIT_TREE_NODE_ARRAY_SIZE(...) (sizeof((struct init_tree_node[]){__VA_ARGS__}) /\
sizeof(struct init_tree_node))
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
index 825b662f809b..afe7f0bffb93 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
@@ -39,6 +39,16 @@
#include <linux/llist.h>
#include <steering/fs_dr.h>
+#define FDB_TC_MAX_CHAIN 3
+#define FDB_FT_CHAIN (FDB_TC_MAX_CHAIN + 1)
+#define FDB_TC_SLOW_PATH_CHAIN (FDB_FT_CHAIN + 1)
+
+/* The index of the last real chain (FT) + 1 as chain zero is valid as well */
+#define FDB_NUM_CHAINS (FDB_FT_CHAIN + 1)
+
+#define FDB_TC_MAX_PRIO 16
+#define FDB_TC_LEVELS_PER_PRIO 2
+
struct mlx5_modify_hdr {
enum mlx5_flow_namespace_type ns_type;
union {
--
2.26.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH mlx5-next 3/3] net/mlx5: kTLS, Improve TLS params layout structures
2020-06-26 5:59 [PATCH mlx5-next 1/3] net/mlx5: Avoid RDMA file inclusion in core driver Saeed Mahameed
2020-06-26 5:59 ` [PATCH mlx5-next 2/3] net/mlx5: Avoid eswitch header inclusion in fs core layer Saeed Mahameed
@ 2020-06-26 5:59 ` Saeed Mahameed
1 sibling, 0 replies; 3+ messages in thread
From: Saeed Mahameed @ 2020-06-26 5:59 UTC (permalink / raw)
To: Saeed Mahameed, Leon Romanovsky; +Cc: netdev, linux-rdma, Tariq Toukan
From: Tariq Toukan <tariqt@mellanox.com>
Add explicit WQE segment structures for the TLS static and progress
params.
According to the HW spec, TISN is not part of the progress params context,
take it out of it.
Rename the control segment tisn field as it could hold either a TIS or
a TIR number.
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
---
drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h | 2 +-
.../ethernet/mellanox/mlx5/core/en_accel/ktls.h | 2 +-
.../ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c | 14 +++++++++-----
.../mellanox/mlx5/core/en_accel/tls_rxtx.c | 2 +-
include/linux/mlx5/device.h | 9 +++++++++
include/linux/mlx5/mlx5_ifc.h | 5 +----
include/linux/mlx5/qp.h | 2 +-
7 files changed, 23 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h
index bfd3e1161bc6..31cac239563d 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h
@@ -182,7 +182,7 @@ mlx5e_notify_hw(struct mlx5_wq_cyc *wq, u16 pc, void __iomem *uar_map,
static inline bool mlx5e_transport_inline_tx_wqe(struct mlx5_wqe_ctrl_seg *cseg)
{
- return cseg && !!cseg->tisn;
+ return cseg && !!cseg->tis_tir_num;
}
static inline u8
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h
index c6180892cfcb..806ed185dd4c 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h
@@ -19,7 +19,7 @@
#define MLX5E_KTLS_PROGRESS_WQE_SZ \
(offsetof(struct mlx5e_tx_wqe, tls_progress_params_ctx) + \
- MLX5_ST_SZ_BYTES(tls_progress_params))
+ sizeof(struct mlx5_wqe_tls_progress_params_seg))
#define MLX5E_KTLS_PROGRESS_WQEBBS \
(DIV_ROUND_UP(MLX5E_KTLS_PROGRESS_WQE_SZ, MLX5_SEND_WQE_BB))
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c
index 3cd78d9503c1..ad7300f19815 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c
@@ -64,7 +64,7 @@ build_static_params(struct mlx5e_umr_wqe *wqe, u16 pc, u32 sqn,
cseg->qpn_ds = cpu_to_be32((sqn << MLX5_WQE_CTRL_QPN_SHIFT) |
STATIC_PARAMS_DS_CNT);
cseg->fm_ce_se = fence ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;
- cseg->tisn = cpu_to_be32(priv_tx->tisn << 8);
+ cseg->tis_tir_num = cpu_to_be32(priv_tx->tisn << 8);
ucseg->flags = MLX5_UMR_INLINE;
ucseg->bsf_octowords = cpu_to_be16(MLX5_ST_SZ_BYTES(tls_static_params) / 16);
@@ -75,10 +75,14 @@ build_static_params(struct mlx5e_umr_wqe *wqe, u16 pc, u32 sqn,
static void
fill_progress_params_ctx(void *ctx, struct mlx5e_ktls_offload_context_tx *priv_tx)
{
- MLX5_SET(tls_progress_params, ctx, tisn, priv_tx->tisn);
- MLX5_SET(tls_progress_params, ctx, record_tracker_state,
+ struct mlx5_wqe_tls_progress_params_seg *params;
+
+ params = ctx;
+
+ params->tis_tir_num = cpu_to_be32(priv_tx->tisn);
+ MLX5_SET(tls_progress_params, params->ctx, record_tracker_state,
MLX5E_TLS_PROGRESS_PARAMS_RECORD_TRACKER_STATE_START);
- MLX5_SET(tls_progress_params, ctx, auth_state,
+ MLX5_SET(tls_progress_params, params->ctx, auth_state,
MLX5E_TLS_PROGRESS_PARAMS_AUTH_STATE_NO_OFFLOAD);
}
@@ -284,7 +288,7 @@ tx_post_resync_dump(struct mlx5e_txqsq *sq, skb_frag_t *frag, u32 tisn, bool fir
cseg->opmod_idx_opcode = cpu_to_be32((sq->pc << 8) | MLX5_OPCODE_DUMP);
cseg->qpn_ds = cpu_to_be32((sq->sqn << 8) | ds_cnt);
- cseg->tisn = cpu_to_be32(tisn << 8);
+ cseg->tis_tir_num = cpu_to_be32(tisn << 8);
cseg->fm_ce_se = first ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;
fsz = skb_frag_size(frag);
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls_rxtx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls_rxtx.c
index 05454a843b28..72d26fbc8d5b 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls_rxtx.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls_rxtx.c
@@ -305,7 +305,7 @@ bool mlx5e_tls_handle_tx_skb(struct net_device *netdev, struct mlx5e_txqsq *sq,
void mlx5e_tls_handle_tx_wqe(struct mlx5e_txqsq *sq, struct mlx5_wqe_ctrl_seg *cseg,
struct mlx5e_accel_tx_tls_state *state)
{
- cseg->tisn = cpu_to_be32(state->tls_tisn << 8);
+ cseg->tis_tir_num = cpu_to_be32(state->tls_tisn << 8);
}
static int tls_update_resync_sn(struct net_device *netdev,
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 1bc27aca648b..57db125e5802 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -458,6 +458,15 @@ enum {
MLX5_OPC_MOD_TLS_TIR_PROGRESS_PARAMS = 0x2,
};
+struct mlx5_wqe_tls_static_params_seg {
+ u8 ctx[MLX5_ST_SZ_BYTES(tls_static_params)];
+};
+
+struct mlx5_wqe_tls_progress_params_seg {
+ __be32 tis_tir_num;
+ u8 ctx[MLX5_ST_SZ_BYTES(tls_progress_params)];
+};
+
enum {
MLX5_SET_PORT_RESET_QKEY = 0,
MLX5_SET_PORT_GUID0 = 16,
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 116bd9bb347f..a227518c70cf 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -10638,16 +10638,13 @@ struct mlx5_ifc_tls_static_params_bits {
};
struct mlx5_ifc_tls_progress_params_bits {
- u8 reserved_at_0[0x8];
- u8 tisn[0x18];
-
u8 next_record_tcp_sn[0x20];
u8 hw_resync_tcp_sn[0x20];
u8 record_tracker_state[0x2];
u8 auth_state[0x2];
- u8 reserved_at_64[0x4];
+ u8 reserved_at_44[0x4];
u8 hw_offset_record_number[0x18];
};
diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h
index b8992b861ae6..36492a1342cf 100644
--- a/include/linux/mlx5/qp.h
+++ b/include/linux/mlx5/qp.h
@@ -209,7 +209,7 @@ struct mlx5_wqe_ctrl_seg {
__be32 general_id;
__be32 imm;
__be32 umr_mkey;
- __be32 tisn;
+ __be32 tis_tir_num;
};
};
--
2.26.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-06-26 6:00 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-06-26 5:59 [PATCH mlx5-next 1/3] net/mlx5: Avoid RDMA file inclusion in core driver Saeed Mahameed
2020-06-26 5:59 ` [PATCH mlx5-next 2/3] net/mlx5: Avoid eswitch header inclusion in fs core layer Saeed Mahameed
2020-06-26 5:59 ` [PATCH mlx5-next 3/3] net/mlx5: kTLS, Improve TLS params layout structures Saeed Mahameed
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