From: Leon Romanovsky <leonro@nvidia.com> The two fixes are targeted to the -next. Maor's change fixes DM code that was accepted in this cycle and Parav's change doesn't qualify urgency of -rc8. Thanks Maor Gottlieb (1): RDMA/mlx5: Fix type assignment for ICM DM Parav Pandit (1): IB/mlx5: Set right RoCE l3 type and roce version while deleting GID drivers/infiniband/hw/mlx5/dm.c | 23 +++++++++++-------- drivers/infiniband/hw/mlx5/main.c | 8 +++---- .../net/ethernet/mellanox/mlx5/core/lib/gid.c | 4 ++-- 3 files changed, 19 insertions(+), 16 deletions(-) -- 2.30.2
From: Parav Pandit <parav@nvidia.com> Currently when GID is deleted, it zero out all the fields of the RoCE address in the SET_ROCE_ADDRESS command for a specified index. roce_version = 0 means RoCEv1 in the SET_ROCE_ADDRESS command. This assumes that device has RoCEv1 always enabled which is not always correct. For example Subfunction does not support RoCEv1. Due to this assumption a previously added RoCEv2 GID is always deleted as RoCEv1 GID. This results in a below syndrome. mlx5_core.sf mlx5_core.sf.4: mlx5_cmd_check:777:(pid 4256): SET_ROCE_ADDRESS(0x761) op_mod(0x0) failed, status bad parameter(0x3), syndrome (0x12822d) Hence set the right RoCE version during GID deletion provided by the core. Signed-off-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> --- drivers/infiniband/hw/mlx5/main.c | 8 ++++---- drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c index 7ea6137f8d12..6d1dd09a4388 100644 --- a/drivers/infiniband/hw/mlx5/main.c +++ b/drivers/infiniband/hw/mlx5/main.c @@ -555,15 +555,15 @@ static int set_roce_addr(struct mlx5_ib_dev *dev, u32 port_num, unsigned int index, const union ib_gid *gid, const struct ib_gid_attr *attr) { - enum ib_gid_type gid_type = IB_GID_TYPE_ROCE; + enum ib_gid_type gid_type; u16 vlan_id = 0xffff; u8 roce_version = 0; u8 roce_l3_type = 0; u8 mac[ETH_ALEN]; int ret; + gid_type = attr->gid_type; if (gid) { - gid_type = attr->gid_type; ret = rdma_read_gid_l2_fields(attr, &vlan_id, &mac[0]); if (ret) return ret; @@ -575,7 +575,7 @@ static int set_roce_addr(struct mlx5_ib_dev *dev, u32 port_num, break; case IB_GID_TYPE_ROCE_UDP_ENCAP: roce_version = MLX5_ROCE_VERSION_2; - if (ipv6_addr_v4mapped((void *)gid)) + if (gid && ipv6_addr_v4mapped((void *)gid)) roce_l3_type = MLX5_ROCE_L3_TYPE_IPV4; else roce_l3_type = MLX5_ROCE_L3_TYPE_IPV6; @@ -602,7 +602,7 @@ static int mlx5_ib_del_gid(const struct ib_gid_attr *attr, __always_unused void **context) { return set_roce_addr(to_mdev(attr->device), attr->port_num, - attr->index, NULL, NULL); + attr->index, NULL, attr); } __be16 mlx5_get_roce_udp_sport_min(const struct mlx5_ib_dev *dev, diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c index a68738c8f4bc..215fa8bdce48 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c @@ -142,10 +142,10 @@ int mlx5_core_roce_gid_set(struct mlx5_core_dev *dev, unsigned int index, } ether_addr_copy(addr_mac, mac); - MLX5_SET_RA(in_addr, roce_version, roce_version); - MLX5_SET_RA(in_addr, roce_l3_type, roce_l3_type); memcpy(addr_l3_addr, gid, gidsz); } + MLX5_SET_RA(in_addr, roce_version, roce_version); + MLX5_SET_RA(in_addr, roce_l3_type, roce_l3_type); if (MLX5_CAP_GEN(dev, num_vhca_ports) > 0) MLX5_SET(set_roce_address_in, in, vhca_port_num, port_num); -- 2.30.2
From: Maor Gottlieb <maorg@nvidia.com> We should hold the UAPI DM type in the base struct and not the internal mlx5 type. Fix it. Fixes: 9905fb65119f ("RDMA/mlx5: Re-organize the DM code") Signed-off-by: Maor Gottlieb <maorg@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> --- drivers/infiniband/hw/mlx5/dm.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/infiniband/hw/mlx5/dm.c b/drivers/infiniband/hw/mlx5/dm.c index 235aad6beacb..094bf85589db 100644 --- a/drivers/infiniband/hw/mlx5/dm.c +++ b/drivers/infiniband/hw/mlx5/dm.c @@ -331,12 +331,20 @@ static struct ib_dm *handle_alloc_dm_memic(struct ib_ucontext *ctx, return ERR_PTR(err); } +static enum mlx5_sw_icm_type get_icm_type(int uapi_type) +{ + return uapi_type == MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM ? + MLX5_SW_ICM_TYPE_STEERING : + MLX5_SW_ICM_TYPE_HEADER_MODIFY; +} + static struct ib_dm *handle_alloc_dm_sw_icm(struct ib_ucontext *ctx, struct ib_dm_alloc_attr *attr, struct uverbs_attr_bundle *attrs, int type) { struct mlx5_core_dev *dev = to_mdev(ctx->device)->mdev; + enum mlx5_sw_icm_type icm_type = get_icm_type(type); struct mlx5_ib_dm_icm *dm; u64 act_size; int err; @@ -368,7 +376,7 @@ static struct ib_dm *handle_alloc_dm_sw_icm(struct ib_ucontext *ctx, act_size = roundup_pow_of_two(act_size); dm->base.size = act_size; - err = mlx5_dm_sw_icm_alloc(dev, type, act_size, attr->alignment, + err = mlx5_dm_sw_icm_alloc(dev, icm_type, act_size, attr->alignment, to_mucontext(ctx)->devx_uid, &dm->base.dev_addr, &dm->obj_id); if (err) @@ -377,7 +385,7 @@ static struct ib_dm *handle_alloc_dm_sw_icm(struct ib_ucontext *ctx, err = uverbs_copy_to(attrs, MLX5_IB_ATTR_ALLOC_DM_RESP_START_OFFSET, &dm->base.dev_addr, sizeof(dm->base.dev_addr)); if (err) { - mlx5_dm_sw_icm_dealloc(dev, type, dm->base.size, + mlx5_dm_sw_icm_dealloc(dev, icm_type, dm->base.size, to_mucontext(ctx)->devx_uid, dm->base.dev_addr, dm->obj_id); goto free; @@ -409,11 +417,9 @@ struct ib_dm *mlx5_ib_alloc_dm(struct ib_device *ibdev, case MLX5_IB_UAPI_DM_TYPE_MEMIC: return handle_alloc_dm_memic(context, attr, attrs); case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM: - return handle_alloc_dm_sw_icm(context, attr, attrs, - MLX5_SW_ICM_TYPE_STEERING); + return handle_alloc_dm_sw_icm(context, attr, attrs, type); case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM: - return handle_alloc_dm_sw_icm(context, attr, attrs, - MLX5_SW_ICM_TYPE_HEADER_MODIFY); + return handle_alloc_dm_sw_icm(context, attr, attrs, type); default: return ERR_PTR(-EOPNOTSUPP); } @@ -441,10 +447,7 @@ static void mlx5_dm_memic_dealloc(struct mlx5_ib_dm_memic *dm) static int mlx5_dm_icm_dealloc(struct mlx5_ib_ucontext *ctx, struct mlx5_ib_dm_icm *dm) { - enum mlx5_sw_icm_type type = - dm->base.type == MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM ? - MLX5_SW_ICM_TYPE_STEERING : - MLX5_SW_ICM_TYPE_HEADER_MODIFY; + enum mlx5_sw_icm_type type = get_icm_type(dm->base.type); struct mlx5_core_dev *dev = to_mdev(dm->base.ibdm.device)->mdev; int err; -- 2.30.2
On Sun, Apr 18, 2021 at 04:49:38PM +0300, Leon Romanovsky wrote:
> From: Leon Romanovsky <leonro@nvidia.com>
>
> The two fixes are targeted to the -next. Maor's change fixes DM code
> that was accepted in this cycle and Parav's change doesn't qualify
> urgency of -rc8.
>
> Thanks
>
> Maor Gottlieb (1):
> RDMA/mlx5: Fix type assignment for ICM DM
>
> Parav Pandit (1):
> IB/mlx5: Set right RoCE l3 type and roce version while deleting GID
Applied to for-next, thanks
Jason