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From: Yishai Hadas <yishaih@nvidia.com>
To: <linux-rdma@vger.kernel.org>
Cc: <jgg@nvidia.com>, <yishaih@nvidia.com>, <maorg@nvidia.com>,
	<markzhang@nvidia.com>, <edwards@nvidia.com>,
	Ido Kalir <idok@nvidia.com>
Subject: [PATCH rdma-core 21/27] pyverbs: Add auxiliary memory functions
Date: Tue, 20 Jul 2021 11:16:41 +0300	[thread overview]
Message-ID: <20210720081647.1980-22-yishaih@nvidia.com> (raw)
In-Reply-To: <20210720081647.1980-1-yishaih@nvidia.com>

From: Edward Srouji <edwards@nvidia.com>

Add some auxiliary functions to mem_alloc module to expose to Python
users the ability to read/write from/to memory, with chuncks of 4/8
bytes.
In addition, expose udma memory barriers and the ability to write on
MMIO.

Reviewed-by: Ido Kalir <idok@nvidia.com>
Signed-off-by: Edward Srouji <edwards@nvidia.com>
---
 pyverbs/CMakeLists.txt |  7 +++++++
 pyverbs/dma_util.pyx   | 25 +++++++++++++++++++++++++
 pyverbs/mem_alloc.pyx  | 46 +++++++++++++++++++++++++++++++++++++++++++++-
 3 files changed, 77 insertions(+), 1 deletion(-)
 create mode 100644 pyverbs/dma_util.pyx

diff --git a/pyverbs/CMakeLists.txt b/pyverbs/CMakeLists.txt
index c532b4c..f403719 100644
--- a/pyverbs/CMakeLists.txt
+++ b/pyverbs/CMakeLists.txt
@@ -12,6 +12,12 @@ else()
   set(DMABUF_ALLOC dmabuf_alloc_stub.c)
 endif()
 
+if (HAVE_COHERENT_DMA)
+  set(DMA_UTIL dma_util.pyx)
+else()
+  set(DMA_UTIL "")
+endif()
+
 rdma_cython_module(pyverbs ""
   addr.pyx
   base.pyx
@@ -19,6 +25,7 @@ rdma_cython_module(pyverbs ""
   cmid.pyx
   cq.pyx
   device.pyx
+  ${DMA_UTIL}
   dmabuf.pyx
   ${DMABUF_ALLOC}
   enums.pyx
diff --git a/pyverbs/dma_util.pyx b/pyverbs/dma_util.pyx
new file mode 100644
index 0000000..36d5f9b
--- /dev/null
+++ b/pyverbs/dma_util.pyx
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0 OR Linux-OpenIB)
+# Copyright (c) 2021 Nvidia, Inc. All rights reserved. See COPYING file
+
+#cython: language_level=3
+
+from libc.stdint cimport uintptr_t, uint64_t
+
+cdef extern from 'util/udma_barrier.h':
+    cdef void udma_to_device_barrier()
+    cdef void udma_from_device_barrier()
+
+cdef extern from 'util/mmio.h':
+   cdef void mmio_write64_be(void *addr, uint64_t val)
+
+
+def udma_to_dev_barrier():
+    udma_to_device_barrier()
+
+
+def udma_from_dev_barrier():
+    udma_from_device_barrier()
+
+
+def mmio_write64_as_be(addr, val):
+    mmio_write64_be(<void*><uintptr_t> addr, val)
diff --git a/pyverbs/mem_alloc.pyx b/pyverbs/mem_alloc.pyx
index 24be4f1..c6290f7 100644
--- a/pyverbs/mem_alloc.pyx
+++ b/pyverbs/mem_alloc.pyx
@@ -6,13 +6,17 @@
 from posix.stdlib cimport posix_memalign as c_posix_memalign
 from libc.stdlib cimport malloc as c_malloc, free as c_free
 from posix.mman cimport mmap as c_mmap, munmap as c_munmap
-from libc.stdint cimport uintptr_t
+from libc.stdint cimport uintptr_t, uint32_t, uint64_t
 from libc.string cimport memset
 cimport posix.mman as mm
 
 cdef extern from 'sys/mman.h':
     cdef void* MAP_FAILED
 
+cdef extern from 'endian.h':
+    unsigned long htobe32(unsigned long host_32bits)
+    unsigned long htobe64(unsigned long host_64bits)
+
 
 def mmap(addr=0, length=100, prot=mm.PROT_READ | mm.PROT_WRITE,
          flags=mm.MAP_PRIVATE | mm.MAP_ANONYMOUS, fd=0, offset=0):
@@ -82,6 +86,46 @@ def free(ptr):
     c_free(<void*><uintptr_t>ptr)
 
 
+def writebe32(addr, val, offset=0):
+    """
+    Write 32-bit value <val> as Big Endian to address <addr> and offset <offset>
+    :param addr: The start of the address to write the value to
+    :param val: Value to write
+    :param offset: Offset of the address  to write the value to (in 4-bytes)
+    """
+    (<uint32_t*><void*><uintptr_t>addr)[offset] = htobe32(val)
+
+
+def writebe64(addr, val, offset=0):
+    """
+    Write 64-bit value <val> as Big Endian to address <addr> and offset <offset>
+    :param addr: The start of the address to write the value to
+    :param val: Value to write
+    :param offset: Offset of the address  to write the value to (in 8-bytes)
+    """
+    (<uint64_t*><void*><uintptr_t>addr)[offset] = htobe64(val)
+
+
+def read32(addr, offset=0):
+    """
+    Read 32-bit value from address <addr> and offset <offset>
+    :param addr: The start of the address to read from
+    :param offset: Offset of the address to read from (in 4-bytes)
+    :return: The read value
+    """
+    return (<uint32_t*><uintptr_t>addr)[offset]
+
+
+def read64(addr, offset=0):
+    """
+    Read 64-bit value from address <addr> and offset <offset>
+    :param addr: The start of the address to read from
+    :param offset: Offset of the address to read from (in 8-bytes)
+    :return: The read value
+    """
+    return (<uint64_t*><uintptr_t>addr)[offset]
+
+
 # protection bits for mmap/mprotect
 PROT_EXEC_ = mm.PROT_EXEC
 PROT_READ_ = mm.PROT_READ
-- 
1.8.3.1


  parent reply	other threads:[~2021-07-20  8:18 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-20  8:16 [PATCH rdma-core 00/27] Introduce mlx5 user space driver over VFIO Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 01/27] Update kernel headers Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 02/27] mlx5: Introduce mlx5dv_get_vfio_device_list() Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 03/27] mlx5: Enable debug functionality for vfio Yishai Hadas
2021-07-20  8:51   ` Leon Romanovsky
2021-07-20  9:27     ` Yishai Hadas
2021-07-20 12:27       ` Leon Romanovsky
2021-07-20 14:57         ` Yishai Hadas
2021-07-21  7:05           ` Gal Pressman
2021-07-21  7:58             ` Yishai Hadas
2021-07-21  8:51               ` Gal Pressman
2021-07-20  8:16 ` [PATCH rdma-core 04/27] util: Add interval_set support Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 05/27] verbs: Enable verbs_open_device() to work over non sysfs devices Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 06/27] mlx5: Setup mlx5 vfio context Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 07/27] mlx5: Add mlx5_vfio_cmd_exec() support Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 08/27] mlx5: vfio setup function support Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 09/27] mlx5: vfio setup basic caps Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 10/27] mlx5: Support fast teardown over vfio Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 11/27] mlx5: Enable interrupt command mode " Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 12/27] mlx5: Introduce vfio APIs to process events Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 13/27] mlx5: VFIO poll_health support Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 14/27] mlx5: Implement basic verbs operation for PD and MR over vfio Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 15/27] mlx5: Set DV context ops Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 16/27] mlx5: Support initial DEVX/DV APIs over vfio Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 17/27] mlx5: Implement mlx5dv devx_obj " Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 18/27] pyverbs: Support DevX UMEM registration Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 19/27] pyverbs/mlx5: Support EQN querying Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 20/27] pyverbs/mlx5: Support more DevX objects Yishai Hadas
2021-07-20  8:16 ` Yishai Hadas [this message]
2021-07-20  8:16 ` [PATCH rdma-core 22/27] pyverbs/mlx5: Add support to extract mlx5dv objects Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 23/27] pyverbs/mlx5: Wrap mlx5_cqe64 struct and add enums Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 24/27] tests: Add MAC address to the tests' args Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 25/27] tests: Add mlx5 DevX data path test Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 26/27] pyverbs/mlx5: Support mlx5 devices over VFIO Yishai Hadas
2021-07-20  8:16 ` [PATCH rdma-core 27/27] tests: Add a test for mlx5 " Yishai Hadas
2021-08-01  8:00 ` [PATCH rdma-core 00/27] Introduce mlx5 user space driver " Yishai Hadas

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