From: Tatyana Nikolova <tatyana.e.nikolova@intel.com>
To: jgg@nvidia.com
Cc: dledford@redhat.com, leon@kernel.org, linux-rdma@vger.kernel.org
Subject: [PATCH rdma-core] irdma: Restore full memory barrier for doorbell optimization
Date: Fri, 13 Aug 2021 17:25:49 -0500 [thread overview]
Message-ID: <20210813222549.739-1-tatyana.e.nikolova@intel.com> (raw)
In-Reply-To: <20210810115933.GB5158@nvidia.com>
>> 1. Software writing the valid bit in the WQE.
>> 2. Software reading shadow memory (hw_tail) value.
> You are missing an ordered atomic on this read it looks like
Hi Jason,
Why do you think we need atomic ops in this case? We aren't trying to protect from multiple threads but CPU re-ordering of a write and a read.
Thank you,
Tatyana
next prev parent reply other threads:[~2021-08-13 22:26 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-05 16:11 [PATCH rdma-core] irdma: Restore full memory barrier for doorbell optimization Tatyana Nikolova
2021-08-06 1:28 ` Jason Gunthorpe
2021-08-09 20:07 ` Nikolova, Tatyana E
2021-08-10 11:59 ` Jason Gunthorpe
2021-08-13 22:25 ` Tatyana Nikolova [this message]
2021-08-18 16:49 ` Jason Gunthorpe
2021-08-19 22:01 ` Nikolova, Tatyana E
2021-08-19 22:44 ` Jason Gunthorpe
2021-09-02 16:27 ` Nikolova, Tatyana E
2021-09-02 17:09 ` Jason Gunthorpe
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