From: Haoyue Xu <xuhaoyue1@hisilicon.com>
To: <jgg@nvidia.com>, <leon@kernel.org>
Cc: <linux-rdma@vger.kernel.org>, <linuxarm@huawei.com>,
<xuhaoyue1@hisilicon.com>
Subject: [RFC PATCH for-next 1/1] RDMA/hns: Add SVE DIRECT WQE flag to support libhns
Date: Sat, 25 Feb 2023 18:02:51 +0800 [thread overview]
Message-ID: <20230225100253.3993383-2-xuhaoyue1@hisilicon.com> (raw)
In-Reply-To: <20230225100253.3993383-1-xuhaoyue1@hisilicon.com>
From: Yixing Liu <liuyixing1@huawei.com>
Added SVE DWQE flag to control libhns SVE DWQE function.
Signed-off-by: Yixing Liu <liuyixing1@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_device.h | 1 +
drivers/infiniband/hw/hns/hns_roce_qp.c | 3 +++
include/uapi/rdma/hns-abi.h | 1 +
3 files changed, 5 insertions(+)
diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h
index 84239b907de2..bd503276f262 100644
--- a/drivers/infiniband/hw/hns/hns_roce_device.h
+++ b/drivers/infiniband/hw/hns/hns_roce_device.h
@@ -142,6 +142,7 @@ enum {
HNS_ROCE_CAP_FLAG_QP_FLOW_CTRL = BIT(9),
HNS_ROCE_CAP_FLAG_ATOMIC = BIT(10),
HNS_ROCE_CAP_FLAG_DIRECT_WQE = BIT(12),
+ HNS_ROCE_CAP_FLAG_SVE_DIRECT_WQE = BIT(13),
HNS_ROCE_CAP_FLAG_SDI_MODE = BIT(14),
HNS_ROCE_CAP_FLAG_STASH = BIT(17),
HNS_ROCE_CAP_FLAG_CQE_INLINE = BIT(19),
diff --git a/drivers/infiniband/hw/hns/hns_roce_qp.c b/drivers/infiniband/hw/hns/hns_roce_qp.c
index d855a917f4cf..efc4b71d5b8b 100644
--- a/drivers/infiniband/hw/hns/hns_roce_qp.c
+++ b/drivers/infiniband/hw/hns/hns_roce_qp.c
@@ -749,6 +749,9 @@ static int alloc_qp_buf(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp,
if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_DIRECT_WQE)
hr_qp->en_flags |= HNS_ROCE_QP_CAP_DIRECT_WQE;
+ if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_SVE_DIRECT_WQE)
+ hr_qp->en_flags |= HNS_ROCE_QP_CAP_SVE_DIRECT_WQE;
+
return 0;
err_inline:
diff --git a/include/uapi/rdma/hns-abi.h b/include/uapi/rdma/hns-abi.h
index 2e68a8b0c92c..a6c7abe0c225 100644
--- a/include/uapi/rdma/hns-abi.h
+++ b/include/uapi/rdma/hns-abi.h
@@ -77,6 +77,7 @@ enum hns_roce_qp_cap_flags {
HNS_ROCE_QP_CAP_RQ_RECORD_DB = 1 << 0,
HNS_ROCE_QP_CAP_SQ_RECORD_DB = 1 << 1,
HNS_ROCE_QP_CAP_OWNER_DB = 1 << 2,
+ HNS_ROCE_QP_CAP_SVE_DIRECT_WQE = 1 << 3,
HNS_ROCE_QP_CAP_DIRECT_WQE = 1 << 5,
};
--
2.30.0
next prev parent reply other threads:[~2023-02-25 10:04 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-25 10:02 [RFC PATCH for-next 0/1] Add SVE ldr and str instruction Haoyue Xu
2023-02-25 10:02 ` Haoyue Xu [this message]
2023-02-25 10:02 ` [RFC PATCH for-next 2/3] Update kernel headers Haoyue Xu
2023-02-25 10:02 ` [RFC PATCH for-next 3/3] libhns: Add support for SVE Direct WQE function Haoyue Xu
2023-03-22 19:02 ` Jason Gunthorpe
2023-03-27 12:53 ` xuhaoyue (A)
2023-03-27 12:55 ` Jason Gunthorpe
2023-03-30 12:57 ` xuhaoyue (A)
2023-03-30 13:01 ` Jason Gunthorpe
2023-03-31 3:38 ` xuhaoyue (A)
2023-03-31 11:39 ` Jason Gunthorpe
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