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([2a02:908:1252:fb60:be8a:bd56:1f94:86e7]) by smtp.gmail.com with ESMTPSA id g21sm17224edr.45.2020.07.22.07.23.45 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Jul 2020 07:23:46 -0700 (PDT) Reply-To: christian.koenig@amd.com Subject: Re: [Linaro-mm-sig] [PATCH 1/2] dma-buf.rst: Document why indefinite fences are a bad idea To: Daniel Vetter , =?UTF-8?Q?Thomas_Hellstr=c3=b6m_=28Intel=29?= Cc: Felix Kuehling , Daniel Stone , linux-rdma , Intel Graphics Development , Maarten Lankhorst , DRI Development , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Steve Pronovost , amd-gfx mailing list , Jason Ekstrand , Jesse Natalie , Daniel Vetter , Thomas Hellstrom , Linux Media Mailing List , Dave Airlie , =?UTF-8?Q?Christian_K=c3=b6nig?= , Mika Kuoppala References: <20200707201229.472834-4-daniel.vetter@ffwll.ch> <20200709123339.547390-1-daniel.vetter@ffwll.ch> <93b673b7-bb48-96eb-dc2c-bd4f9304000e@shipmail.org> <20200721074157.GB3278063@phenom.ffwll.local> <3603bb71-318b-eb53-0532-9daab62dce86@amd.com> <57a5eb9d-b74f-8ce4-7199-94e911d9b68b@shipmail.org> <805c49b7-f0b3-45dc-5fe3-b352f0971527@shipmail.org> <92393d26-d863-aac6-6d27-53cad6854e13@shipmail.org> <8fd999f2-cbf6-813c-6ad4-131948fb5cc5@shipmail.org> <697d1b5e-5d1c-1655-23f8-7a3f652606f3@shipmail.org> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: Date: Wed, 22 Jul 2020 16:23:44 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org Am 22.07.20 um 16:07 schrieb Daniel Vetter: > On Wed, Jul 22, 2020 at 3:12 PM Thomas Hellström (Intel) > wrote: >> On 2020-07-22 14:41, Daniel Vetter wrote: >>> I'm pretty sure there's more bugs, I just haven't heard from them yet. >>> Also due to the opt-in nature of dma-fence we can limit the scope of >>> what we fix fairly naturally, just don't put them where no one cares >>> :-) Of course that also hides general locking issues in dma_fence >>> signalling code, but well *shrug*. >> Hmm, yes. Another potential big problem would be drivers that want to >> use gpu page faults in the dma-fence critical sections with the >> batch-based programming model. > Yeah that's a massive can of worms. But luckily there's no such driver > merged in upstream, so hopefully we can think about all the > constraints and how to best annotate&enforce this before we land any > code and have big regrets. Do you want a bad news? I once made a prototype for that when Vega10 came out. But we abandoned this approach for the the batch based approach because of the horrible performance. KFD is going to see that, but this is only with user queues and no dma_fence involved whatsoever. Christian. > -Daniel > > > > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx