From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: peng.fan@oss.nxp.com
Cc: ohad@wizery.com, bjorn.andersson@linaro.org,
o.rempel@pengutronix.de, robh+dt@kernel.org,
devicetree@vger.kernel.org, shawnguo@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, linux-remoteproc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Peng Fan <peng.fan@nxp.com>
Subject: Re: [PATCH V5 8/8] remoteproc: imx_rproc: support i.MX8MN/P
Date: Mon, 3 May 2021 10:25:32 -0600 [thread overview]
Message-ID: <20210503162532.GA1699665@xps15> (raw)
In-Reply-To: <1618971622-30539-9-git-send-email-peng.fan@oss.nxp.com>
On Wed, Apr 21, 2021 at 10:20:22AM +0800, peng.fan@oss.nxp.com wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> Add i.MX8MN/P remote processor(Cortex-M7) support, we are using ARM
> SMCCC to start/stop M core, not using regmap interface.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> drivers/remoteproc/imx_rproc.c | 87 +++++++++++++++++++++++++++++++---
> 1 file changed, 80 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
> index d26254609a52..3cb901c87a7d 100644
> --- a/drivers/remoteproc/imx_rproc.c
> +++ b/drivers/remoteproc/imx_rproc.c
> @@ -3,6 +3,7 @@
> * Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
> */
>
> +#include <linux/arm-smccc.h>
> #include <linux/clk.h>
> #include <linux/err.h>
> #include <linux/interrupt.h>
> @@ -50,6 +51,11 @@
>
> #define IMX_RPROC_MEM_MAX 32
>
> +#define IMX_SIP_RPROC 0xC2000005
> +#define IMX_SIP_RPROC_START 0x00
> +#define IMX_SIP_RPROC_STARTED 0x01
> +#define IMX_SIP_RPROC_STOP 0x02
> +
> /**
> * struct imx_rproc_mem - slim internal memory structure
> * @cpu_addr: MPU virtual address of the memory region
> @@ -108,6 +114,36 @@ struct imx_rproc {
> void __iomem *rsc_table;
> };
>
> +static const struct imx_rproc_att imx_rproc_att_imx8mn[] = {
> + /* dev addr , sys addr , size , flags */
> + /* ITCM */
> + { 0x00000000, 0x007E0000, 0x00020000, ATT_OWN },
> + /* OCRAM_S */
> + { 0x00180000, 0x00180000, 0x00009000, 0 },
> + /* OCRAM */
> + { 0x00900000, 0x00900000, 0x00020000, 0 },
> + /* OCRAM */
> + { 0x00920000, 0x00920000, 0x00020000, 0 },
> + /* OCRAM */
> + { 0x00940000, 0x00940000, 0x00050000, 0 },
> + /* QSPI Code - alias */
> + { 0x08000000, 0x08000000, 0x08000000, 0 },
> + /* DDR (Code) - alias */
> + { 0x10000000, 0x40000000, 0x0FFE0000, 0 },
> + /* DTCM */
> + { 0x20000000, 0x00800000, 0x00020000, ATT_OWN },
> + /* OCRAM_S - alias */
> + { 0x20180000, 0x00180000, 0x00008000, ATT_OWN },
> + /* OCRAM */
> + { 0x20200000, 0x00900000, 0x00020000, ATT_OWN },
> + /* OCRAM */
> + { 0x20220000, 0x00920000, 0x00020000, ATT_OWN },
> + /* OCRAM */
> + { 0x20240000, 0x00940000, 0x00040000, ATT_OWN },
> + /* DDR (Data) */
> + { 0x40000000, 0x40000000, 0x80000000, 0 },
> +};
> +
> static const struct imx_rproc_att imx_rproc_att_imx8mq[] = {
> /* dev addr , sys addr , size , flags */
> /* TCML - alias */
> @@ -194,6 +230,12 @@ static const struct imx_rproc_att imx_rproc_att_imx6sx[] = {
> { 0x80000000, 0x80000000, 0x60000000, 0 },
> };
>
> +static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = {
> + .att = imx_rproc_att_imx8mn,
> + .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn),
> + .method = IMX_RPROC_SMC,
> +};
> +
> static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = {
> .src_reg = IMX7D_SRC_SCR,
> .src_mask = IMX7D_M4_RST_MASK,
> @@ -235,12 +277,24 @@ static int imx_rproc_start(struct rproc *rproc)
> struct imx_rproc *priv = rproc->priv;
> const struct imx_rproc_dcfg *dcfg = priv->dcfg;
> struct device *dev = priv->dev;
> + struct arm_smccc_res res;
> int ret;
>
> - ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
> - dcfg->src_mask, dcfg->src_start);
> + switch (dcfg->method) {
> + case IMX_RPROC_MMIO:
> + ret = regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask,
> + dcfg->src_start);
> + break;
> + case IMX_RPROC_SMC:
> + arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_START, 0, 0, 0, 0, 0, 0, &res);
> + ret = res.a0;
> + break;
> + default:
> + return -EOPNOTSUPP;
> + }
> +
> if (ret)
> - dev_err(dev, "Failed to enable M4!\n");
> + dev_err(dev, "Failed to enable remote cores!\n");
s/cores/core
>
> return ret;
> }
> @@ -250,15 +304,26 @@ static int imx_rproc_stop(struct rproc *rproc)
> struct imx_rproc *priv = rproc->priv;
> const struct imx_rproc_dcfg *dcfg = priv->dcfg;
> struct device *dev = priv->dev;
> + struct arm_smccc_res res;
> int ret;
>
> - if (dcfg->method == IMX_RPROC_NONE)
> + switch (dcfg->method) {
> + case IMX_RPROC_MMIO:
> + ret = regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask,
> + dcfg->src_stop);
> + break;
> + case IMX_RPROC_SMC:
> + arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STOP, 0, 0, 0, 0, 0, 0, &res);
> + ret = res.a0;
> + if (res.a1)
> + dev_info(dev, "Not in wfi, force stopped\n");
> + break;
> + default:
> return -EOPNOTSUPP;
> + }
>
> - ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
> - dcfg->src_mask, dcfg->src_stop);
> if (ret)
> - dev_err(dev, "Failed to stop M4!\n");
> + dev_err(dev, "Failed to stop remote cores\n");
s/cores/core
>
> return ret;
> }
> @@ -594,6 +659,7 @@ static int imx_rproc_detect_mode(struct imx_rproc *priv)
> const struct imx_rproc_dcfg *dcfg = priv->dcfg;
> struct device *dev = priv->dev;
> struct regmap *regmap;
> + struct arm_smccc_res res;
> int ret;
> u32 val;
>
> @@ -601,6 +667,11 @@ static int imx_rproc_detect_mode(struct imx_rproc *priv)
> case IMX_RPROC_NONE:
> priv->rproc->state = RPROC_DETACHED;
> return 0;
> + case IMX_RPROC_SMC:
> + arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STARTED, 0, 0, 0, 0, 0, 0, &res);
> + if (res.a0)
> + priv->rproc->state = RPROC_DETACHED;
> + return 0;
> default:
> break;
> }
> @@ -751,6 +822,8 @@ static const struct of_device_id imx_rproc_of_match[] = {
> { .compatible = "fsl,imx6sx-cm4", .data = &imx_rproc_cfg_imx6sx },
> { .compatible = "fsl,imx8mq-cm4", .data = &imx_rproc_cfg_imx8mq },
> { .compatible = "fsl,imx8mm-cm4", .data = &imx_rproc_cfg_imx8mq },
> + { .compatible = "fsl,imx8mn-cm7", .data = &imx_rproc_cfg_imx8mn },
> + { .compatible = "fsl,imx8mp-cm7", .data = &imx_rproc_cfg_imx8mn },
With the above:
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> {},
> };
> MODULE_DEVICE_TABLE(of, imx_rproc_of_match);
> --
> 2.30.0
>
next prev parent reply other threads:[~2021-05-03 16:25 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-21 2:20 [PATCH V5 0/8] remoteproc: imx_rproc: support i.MX7ULP/8MN/8MP peng.fan
2021-04-21 2:20 ` [PATCH V5 1/8] dt-bindings: remoteproc: imx_rproc: add fsl,auto-boot property peng.fan
2021-04-21 2:20 ` [PATCH V5 2/8] dt-bindings: remoteproc: imx_rproc: add i.MX7ULP support peng.fan
2021-04-21 2:20 ` [PATCH V5 3/8] dt-bindings: remoteproc: imx_rproc: support i.MX8MN/P peng.fan
2021-04-21 2:20 ` [PATCH V5 4/8] remoteproc: imx_rproc: parse fsl,auto-boot peng.fan
2021-04-21 2:20 ` [PATCH V5 5/8] remoteproc: imx_rproc: initial support for mutilple start/stop method peng.fan
2021-05-03 16:30 ` Mathieu Poirier
2021-04-21 2:20 ` [PATCH V5 6/8] remoteproc: imx_rproc: make clk optional peng.fan
2021-04-21 2:20 ` [PATCH V5 7/8] remoteproc: imx_rproc: support i.MX7ULP peng.fan
2021-05-03 16:29 ` Mathieu Poirier
2021-05-06 4:11 ` Peng Fan
2021-04-21 2:20 ` [PATCH V5 8/8] remoteproc: imx_rproc: support i.MX8MN/P peng.fan
2021-05-03 16:25 ` Mathieu Poirier [this message]
2021-04-22 16:56 ` [PATCH V5 0/8] remoteproc: imx_rproc: support i.MX7ULP/8MN/8MP Mathieu Poirier
2021-04-23 1:01 ` Peng Fan
2021-04-23 14:50 ` Mathieu Poirier
2021-04-23 23:28 ` Peng Fan
2021-04-26 15:46 ` Mathieu Poirier
2021-04-26 23:45 ` Peng Fan
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