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[118.155.13.174]) by smtp.gmail.com with ESMTPSA id r4sm50924003pgn.54.2018.12.20.12.50.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Dec 2018 12:50:11 -0800 (PST) From: Yoshihiro Kaneko To: linux-renesas-soc@vger.kernel.org Cc: Simon Horman , Geert Uytterhoeven , Magnus Damm , linux-arm-kernel@lists.infradead.org Subject: [PATCH/RFT] arm64: dts: renesas: r8a77990: Create thermal zone to support IPA Date: Fri, 21 Dec 2018 05:49:42 +0900 Message-Id: <1545338982-19466-4-git-send-email-ykaneko0929@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1545338982-19466-1-git-send-email-ykaneko0929@gmail.com> References: <1545338982-19466-1-git-send-email-ykaneko0929@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Dien Pham Setup a thermal zone driven by SoC temperature sensor. Create passive trip points and bind them to CPUFreq cooling device that supports power extension. In R-Car Gen3, IPA is supportted for only one channel (on H3/M3/M3N board, it is channel THS3). Reason: Currently, IPA controls base on only CPU temperature. And only one thermal channel is assembled closest CPU cores is selected as target of IPA. If other channels are used, IPA controlling is not properly. Signed-off-by: Dien Pham [takeshi.kihara.df: fix W=1 dtc unit_address_vs_reg warnings] Signed-off-by: Takeshi Kihara Signed-off-by: Yoshihiro Kaneko --- This patch is based on the devel branch of Simon Horman's renesas tree. arch/arm64/boot/dts/renesas/r8a77990.dtsi | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index b2f606e..c37ba9d 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -66,6 +66,10 @@ power-domains = <&sysc R8A77990_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + #cooling-cells = <2>; + dynamic-power-coefficient = <277>; + cooling-min-level = <0>; + cooling-max-level = <2>; }; a53_1: cpu@1 { @@ -1760,11 +1764,24 @@ thermal-zones { cpu-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&thermal>; + polling-delay = <0>; + thermal-sensors = <&thermal 0>; + sustainable-power = <717>; trips { - cpu-crit { + threshold: trip-point0 { + temperature = <90000>; + hysteresis = <2000>; + type = "passive"; + }; + + target: trip-point1 { + temperature = <100000>; + hysteresis = <2000>; + type = "passive"; + }; + + sensor1_crit: sensor1-crit { temperature = <120000>; hysteresis = <2000>; type = "critical"; @@ -1772,6 +1789,11 @@ }; cooling-maps { + map0 { + trip = <&target>; + cooling-device = <&a53_0 0 2>; + contribution = <1024>; + }; }; }; }; -- 1.9.1