From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CA1FC10F0E for ; Tue, 9 Apr 2019 08:52:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 159F52070D for ; Tue, 9 Apr 2019 08:52:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726580AbfDIIw0 (ORCPT ); Tue, 9 Apr 2019 04:52:26 -0400 Received: from www3345.sakura.ne.jp ([49.212.235.55]:29766 "EHLO www3345.sakura.ne.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726066AbfDIIw0 (ORCPT ); Tue, 9 Apr 2019 04:52:26 -0400 Received: from fsav302.sakura.ne.jp (fsav302.sakura.ne.jp [153.120.85.133]) by www3345.sakura.ne.jp (8.15.2/8.15.2) with ESMTP id x398qIYD010373; Tue, 9 Apr 2019 17:52:18 +0900 (JST) (envelope-from cv-dong@jinso.co.jp) Received: from www3345.sakura.ne.jp (49.212.235.55) by fsav302.sakura.ne.jp (F-Secure/fsigk_smtp/530/fsav302.sakura.ne.jp); Tue, 09 Apr 2019 17:52:18 +0900 (JST) X-Virus-Status: clean(F-Secure/fsigk_smtp/530/fsav302.sakura.ne.jp) Received: from localhost (p14010-ipadfx41marunouchi.tokyo.ocn.ne.jp [61.118.107.10]) (authenticated bits=0) by www3345.sakura.ne.jp (8.15.2/8.15.2) with ESMTPSA id x398qEiG010343 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Tue, 9 Apr 2019 17:52:17 +0900 (JST) (envelope-from cv-dong@jinso.co.jp) From: Cao Van Dong To: linux-renesas-soc@vger.kernel.org, broonie@kernel.org, geert+renesas@glider.be, horms+renesas@verge.net.au, devicetree@vger.kernel.org Cc: yoshihiro.shimoda.uh@renesas.com, kuninori.morimoto.gx@renesas.com, h-inayoshi@jinso.co.jp, nv-dung@jinso.co.jp, na-hoan@jinso.co.jp Subject: [PATCH 01/11] ARM: dts: r8a77470: Add HSCIF support Date: Tue, 9 Apr 2019 17:51:42 +0900 Message-Id: <1554799912-24764-2-git-send-email-cv-dong@jinso.co.jp> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1554799912-24764-1-git-send-email-cv-dong@jinso.co.jp> References: <1554799912-24764-1-git-send-email-cv-dong@jinso.co.jp> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add hscif{0|1|2} nodes to dtsi for HSCIF support on the RZ/G1C (r8a77470) SoC. Signed-off-by: Cao Van Dong --- arch/arm/boot/dts/r8a77470.dtsi | 48 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 493cf2b..85f7a6f 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -588,6 +588,54 @@ status = "disabled"; }; + hscif0: serial@e62c0000 { + compatible = "renesas,hscif-r8a77470", + "renesas,rcar-gen2-hscif", "renesas,hscif"; + reg = <0 0xe62c0000 0 0x60>; + interrupts = ; + clocks = <&cpg CPG_MOD 717>, + <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x39>, <&dmac0 0x3a>, + <&dmac1 0x39>, <&dmac1 0x3a>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc r8a77470_PD_ALWAYS_ON>; + resets = <&cpg 717>; + status = "disabled"; + }; + + hscif1: serial@e62c8000 { + compatible = "renesas,hscif-r8a77470", + "renesas,rcar-gen2-hscif", "renesas,hscif"; + reg = <0 0xe62c8000 0 0x60>; + interrupts = ; + clocks = <&cpg CPG_MOD 716>, + <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, + <&dmac1 0x4d>, <&dmac1 0x4e>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc r8a77470_PD_ALWAYS_ON>; + resets = <&cpg 716>; + status = "disabled"; + }; + + hscif2: serial@e62d0000 { + compatible = "renesas,hscif-r8a77470", + "renesas,rcar-gen2-hscif", "renesas,hscif"; + reg = <0 0xe62d0000 0 0x60>; + interrupts = ; + clocks = <&cpg CPG_MOD 713>, + <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, + <&dmac1 0x3b>, <&dmac1 0x3c>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc r8a77470_PD_ALWAYS_ON>; + resets = <&cpg 713>; + status = "disabled"; + }; + sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a77470", "renesas,rcar-gen2-sdhi"; -- 2.7.4