From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 964D4C31E4B for ; Fri, 14 Jun 2019 11:54:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6F37121537 for ; Fri, 14 Jun 2019 11:54:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727690AbfFNLx7 (ORCPT ); Fri, 14 Jun 2019 07:53:59 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:54471 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727782AbfFNLx7 (ORCPT ); Fri, 14 Jun 2019 07:53:59 -0400 X-IronPort-AV: E=Sophos;i="5.62,373,1554735600"; d="scan'208";a="18466461" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 14 Jun 2019 20:53:58 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 1096140065BE; Fri, 14 Jun 2019 20:53:55 +0900 (JST) From: Fabrizio Castro To: Simon Horman , Geert Uytterhoeven , Rob Herring , Mark Rutland Cc: Fabrizio Castro , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Chris Paterson , Biju Das Subject: [PATCH 4/6] arm64: dts: renesas: r8a774a1: Add missing assigned-clocks for CAN[01] Date: Fri, 14 Jun 2019 12:53:32 +0100 Message-Id: <1560513214-28031-5-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1560513214-28031-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1560513214-28031-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Define "assigned-clocks" and "assigned-clock-rates" properties for CAN[01] DT nodes, as required by the dt-bindings. Fixes: eccc40002972 ("arm64: dts: renesas: r8a774a1: Add clkp2 clock to CAN nodes") Signed-off-by: Fabrizio Castro Reviewed-by: Chris Paterson --- arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index b437edc..99c5452 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -1128,6 +1128,8 @@ <&cpg CPG_CORE R8A774A1_CLK_CANFD>, <&can_clk>; clock-names = "clkp1", "clkp2", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>; + assigned-clock-rates = <40000000>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; resets = <&cpg 916>; status = "disabled"; @@ -1142,6 +1144,8 @@ <&cpg CPG_CORE R8A774A1_CLK_CANFD>, <&can_clk>; clock-names = "clkp1", "clkp2", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>; + assigned-clock-rates = <40000000>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; resets = <&cpg 915>; status = "disabled"; -- 2.7.4