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From: Biju Das <biju.das@bp.renesas.com>
To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>
Cc: Biju Das <biju.das@bp.renesas.com>,
	Simon Horman <horms@verge.net.au>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Subject: [PATCH v3 2/9] arm64: dts: renesas: r8a774b1: Add DU device to DT
Date: Wed,  2 Oct 2019 16:20:12 +0100	[thread overview]
Message-ID: <1570029619-43238-3-git-send-email-biju.das@bp.renesas.com> (raw)
In-Reply-To: <1570029619-43238-1-git-send-email-biju.das@bp.renesas.com>

Add the DU device to r8a774b1 SoC DT.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 V1-->V2
   * No change
   * Added Laurent's Reviewed-by tag.
 V2-->V3
   * No Change
---
 arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 38 +++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
index 9d5630a..777b45d 100644
--- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
@@ -1285,7 +1285,18 @@
 		};
 
 		du: display@feb00000 {
+			compatible = "renesas,du-r8a774b1";
 			reg = <0 0xfeb00000 0 0x80000>;
+			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 724>,
+				 <&cpg CPG_MOD 723>,
+				 <&cpg CPG_MOD 721>;
+			clock-names = "du.0", "du.1", "du.3";
+			status = "disabled";
+
+			vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
 
 			ports {
 				#address-cells = <1>;
@@ -1304,6 +1315,33 @@
 				port@2 {
 					reg = <2>;
 					du_out_lvds0: endpoint {
+						remote-endpoint = <&lvds0_in>;
+					};
+				};
+			};
+		};
+
+		lvds0: lvds@feb90000 {
+			compatible = "renesas,r8a774b1-lvds";
+			reg = <0 0xfeb90000 0 0x14>;
+			clocks = <&cpg CPG_MOD 727>;
+			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+			resets = <&cpg 727>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					lvds0_in: endpoint {
+						remote-endpoint = <&du_out_lvds0>;
+					};
+				};
+				port@1 {
+					reg = <1>;
+					lvds0_out: endpoint {
 					};
 				};
 			};
-- 
2.7.4


  parent reply	other threads:[~2019-10-02 15:20 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-02 15:20 [PATCH v3 0/9] Add Display support Biju Das
2019-10-02 15:20 ` [PATCH v3 1/9] arm64: dts: renesas: hihope-common: Move du clk properties out of common dtsi Biju Das
2019-10-09 14:57   ` Geert Uytterhoeven
2019-10-02 15:20 ` Biju Das [this message]
2019-10-09 12:37   ` [PATCH v3 2/9] arm64: dts: renesas: r8a774b1: Add DU device to DT Geert Uytterhoeven
2019-10-02 15:20 ` [PATCH v3 3/9] arm64: dts: renesas: r8a774b1: Add HDMI encoder instance Biju Das
2019-10-09 12:40   ` Geert Uytterhoeven
2019-10-02 15:20 ` [PATCH v3 4/9] arm64: dts: renesas: r8a774b1-hihope-rzg2n: Add display clock properties Biju Das
2019-10-09 12:42   ` Geert Uytterhoeven
2019-10-02 15:20 ` [PATCH v3 5/9] arm64: dts: renesas: r8a774b1: Add FDP1 device nodes Biju Das
2019-10-09 12:43   ` Geert Uytterhoeven
2019-10-02 15:20 ` [PATCH v3 6/9] arm64: dts: renesas: r8a774b1: Add PWM " Biju Das
2019-10-09 12:44   ` Geert Uytterhoeven
2019-10-02 15:20 ` [PATCH v3 7/9] arm64: dts: renesas: hihope-rzg2-ex: Enable backlight Biju Das
2019-10-09 15:27   ` Geert Uytterhoeven
2019-10-02 15:20 ` [PATCH v3 8/9] arm64: dts: renesas: hihope-rzg2-ex: Add LVDS support Biju Das
2019-10-09 15:31   ` Geert Uytterhoeven
2019-10-02 15:20 ` [PATCH v3 9/9] arm64: dts: renesas: Add support for Advantech idk-1110wr LVDS panel Biju Das
2019-10-11 11:35   ` Geert Uytterhoeven

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