From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6C0DECE58C for ; Fri, 11 Oct 2019 04:50:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A14BA21A4A for ; Fri, 11 Oct 2019 04:50:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726287AbfJKEuf (ORCPT ); Fri, 11 Oct 2019 00:50:35 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:42056 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726099AbfJKEuf (ORCPT ); Fri, 11 Oct 2019 00:50:35 -0400 X-IronPort-AV: E=Sophos;i="5.67,282,1566831600"; d="scan'208";a="28630154" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 11 Oct 2019 13:50:33 +0900 Received: from localhost.localdomain (unknown [10.166.17.210]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id F10C3419A01A; Fri, 11 Oct 2019 13:50:32 +0900 (JST) From: Yoshihiro Shimoda To: horms@verge.net.au, linux-pci@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, stable@vger.kernel.org, Yoshihiro Shimoda Subject: [PATCH v4] PCI: rcar: Fix missing MACCTLR register setting in rcar_pcie_hw_init() Date: Fri, 11 Oct 2019 13:50:32 +0900 Message-Id: <1570769432-15358-1-git-send-email-yoshihiro.shimoda.uh@renesas.com> X-Mailer: git-send-email 2.7.4 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org According to the R-Car Gen2/3 manual, the bit 0 of MACCTLR register should be written to 0 before enabling PCIETCTLR.CFINIT because the bit 0 is set to 1 on reset. To avoid unexpected behaviors from this incorrect setting, this patch fixes it. Fixes: c25da4778803 ("PCI: rcar: Add Renesas R-Car PCIe driver") Fixes: be20bbcb0a8c ("PCI: rcar: Add the initialization of PCIe link in resume_noirq()") Cc: # v5.2+ Signed-off-by: Yoshihiro Shimoda Reviewed-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven --- Changes from v3: - Add the setting in rcar_pcie_resume_noirq(). - Add Fixes tag for rcar_pcie_resume_noirq(). - Change the version of the stable ML from v3.16 to v5.2. https://patchwork.kernel.org/patch/11181005/ Changes from v2: - Change the subject. - Fix commit log again. - Add the register setting into the initialization, instead of speedup. - Change commit hash/target version on Fixes and Cc stable tags. - Add Geert-san's Reviewed-by. https://patchwork.kernel.org/patch/11180429/ Changes from v1: - Fix commit log. - Add Sergei-san's Reviewed-by. https://patchwork.kernel.org/patch/11179279/ drivers/pci/controller/pcie-rcar.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/controller/pcie-rcar.c b/drivers/pci/controller/pcie-rcar.c index f6a669a..302c9ea 100644 --- a/drivers/pci/controller/pcie-rcar.c +++ b/drivers/pci/controller/pcie-rcar.c @@ -93,6 +93,7 @@ #define LINK_SPEED_2_5GTS (1 << 16) #define LINK_SPEED_5_0GTS (2 << 16) #define MACCTLR 0x011058 +#define MACCTLR_RESERVED BIT(0) #define SPEED_CHANGE BIT(24) #define SCRAMBLE_DISABLE BIT(27) #define PMSR 0x01105c @@ -615,6 +616,8 @@ static int rcar_pcie_hw_init(struct rcar_pcie *pcie) if (IS_ENABLED(CONFIG_PCI_MSI)) rcar_pci_write_reg(pcie, 0x801f0000, PCIEMSITXR); + rcar_rmw32(pcie, MACCTLR, MACCTLR_RESERVED, 0); + /* Finish initialization - establish a PCI Express link */ rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR); @@ -1237,6 +1240,7 @@ static int rcar_pcie_resume_noirq(struct device *dev) return 0; /* Re-establish the PCIe link */ + rcar_rmw32(pcie, MACCTLR, MACCTLR_RESERVED, 0); rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR); return rcar_pcie_wait_for_dl(pcie); } -- 2.7.4