From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EACD2C2BCA1 for ; Fri, 7 Jun 2019 22:36:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B8AB92067C for ; Fri, 7 Jun 2019 22:36:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="pyva/gFo" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730005AbfFGWgW (ORCPT ); Fri, 7 Jun 2019 18:36:22 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:55440 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729042AbfFGWgW (ORCPT ); Fri, 7 Jun 2019 18:36:22 -0400 Received: from [192.168.0.20] (cpc89242-aztw30-2-0-cust488.18-1.cable.virginm.net [86.31.129.233]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id AAB6B334; Sat, 8 Jun 2019 00:36:19 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1559946980; bh=j5FFVrqIhrnGayeQScH9v/urXDU5UXFWBYSvtpUlKS4=; h=Reply-To:Subject:To:Cc:References:From:Date:In-Reply-To:From; b=pyva/gFomn8TCPxdlKjYq1gmLTubEqxTD39fVDr0/IilmrpgdP0x/cgbiCbmrxf7s En7+d4x3xS4xKtUdvPPEvXan8kH/hmjcayz2KvUjkNftX/mi1km4XlygORyJH3nB/2 h1UABC0/ebgojjIBVD8jrmFa1RryKbMF/r9viSc0= Reply-To: kieran.bingham@ideasonboard.com Subject: Re: [PATCH v3 02/10] dt-bindings: display: bridge: thc63lvd1024: Document dual-link operation To: Laurent Pinchart Cc: Laurent Pinchart , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, Jacopo Mondi , devicetree@vger.kernel.org, Rob Herring References: <20190528141234.15425-1-laurent.pinchart+renesas@ideasonboard.com> <20190528141234.15425-3-laurent.pinchart+renesas@ideasonboard.com> <63985327-c796-c8cc-50c8-f486942e3161@ideasonboard.com> <20190607223020.GB5110@pendragon.ideasonboard.com> From: Kieran Bingham Openpgp: preference=signencrypt Autocrypt: addr=kieran.bingham@ideasonboard.com; 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Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <20190607223020.GB5110@pendragon.ideasonboard.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Hi Laurent, On 07/06/2019 23:30, Laurent Pinchart wrote: > Hi Kieran, > > On Fri, Jun 07, 2019 at 11:15:06PM +0100, Kieran Bingham wrote: >> On 28/05/2019 15:12, Laurent Pinchart wrote: >>> The THC63LVD1024 LVDS decoder can operate in two modes, single-link or >>> dual-link. In dual-link mode both input ports are used to carry even- >>> and odd-numbered pixels separately. Document this in the DT bindings, >>> along with the related rules governing port and usage. >>> >>> Signed-off-by: Laurent Pinchart >>> Reviewed-by: Jacopo Mondi >>> Reviewed-by: Rob Herring >>> Tested-by: Jacopo Mondi >>> --- >>> .../bindings/display/bridge/thine,thc63lvd1024.txt | 6 ++++++ >>> 1 file changed, 6 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.txt b/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.txt >>> index 37f0c04d5a28..d17d1e5820d7 100644 >>> --- a/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.txt >>> +++ b/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.txt >>> @@ -28,6 +28,12 @@ Optional video port nodes: >>> - port@1: Second LVDS input port >>> - port@3: Second digital CMOS/TTL parallel output >>> >>> +The device can operate in single-link mode or dual-link mode. In single-link >>> +mode, all pixels are received on port@0, and port@1 shall not contain any >>> +endpoint. In dual-link mode, even-numbered pixels are received on port@0 and >>> +odd-numbered pixels on port@1, and both port@0 and port@1 shall contain >>> +endpoints. >>> + >> >> Your cover letter details 4 different modes of operation for this part. >> >> Do you anticipate the other combinations {Single-in, dual-out; dual-in, >> dual-out} being supported? Perhaps that would be defined by the relevant >> endpoints being connected or not ? > > I expect that someone might need those modes at some point, but I > haven't specified them on purpose, as I don't like writing DT bindings > that can't be tested. I however expoect that those additional modes can > be derived from the connected endpoints. > >> You state that in dual-link mode, both port@0, and port@1 shall contain >> endpoints, so that implies that you only expect to support dual-in with >> the 'dual-link' property. If that is correct, should it be stated >> explicitly? > > What do you mean by the 'dual-link' property ? The patch series defines > no such property. Aha, my imagination is creating something from all the references to the word 'dual-link' :-D Ok - so it is just the existence of the endpoints which will enable//configure the various modes of operation. I guess that will become more clear when I get down to the driver patches :) > >> Otherwise, >> >> Reviewed-by: Kieran Bingham >> >>> Example: >>> -------- >>> > -- Regards -- Kieran