[PATCH v2 0/5] Add more support to RZ/G1N

[PATCH v2 0/5] Add more support to RZ/G1N

[Biju Das]

This patch series aims to add support for some more interfaces to 
RZ/G1N SoC/iwg20d based board (Display and QSPI).

This patch series tested against renesas-dev.

V1--> V2
	* Add SPI NOR support : Incorporated Geert's review comment.
	* Add DU support : Removed LVDS definition from DU node.

Biju Das (5):
  ARM: dts: iwg20d-q7-common: Move cmt/rwdt node out of RZ/G1M SOM
  ARM: dts: r8a7744-iwg20m: Add SPI NOR support
  ARM: dts: r8a7744: Add DU support
  ARM: dts: r8a7743: Remove LVDS encoder from du node
  ARM: dts: r8a7744: Fix sorting of vsp and msiof nodes

 arch/arm/boot/dts/iwg20d-q7-common.dtsi |   9 ++
 arch/arm/boot/dts/r8a7743-iwg20m.dtsi   |   9 --
 arch/arm/boot/dts/r8a7743.dtsi          |   9 +-
 arch/arm/boot/dts/r8a7744-iwg20m.dtsi   |  26 ++++++
 arch/arm/boot/dts/r8a7744.dtsi          | 161 ++++++++++++++++----------------
 5 files changed, 121 insertions(+), 93 deletions(-)

-- 
2.7.4

[PATCH v2 1/5] ARM: dts: iwg20d-q7-common: Move cmt/rwdt node out of RZ/G1M SOM

[Biju Das]

The iWave RZ/G1N board is almost identical to RZ/G1M. cmt and rwdt modules
are SoC specific and should be part of board dts rather than SoM dtsi. By
moving these nodes to the common dtsi it allows cmt and rwdt to be enabled
on both of these boards with less lines of code.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
V1-->v2 
	* No change
---
 arch/arm/boot/dts/iwg20d-q7-common.dtsi | 9 +++++++++
 arch/arm/boot/dts/r8a7743-iwg20m.dtsi   | 9 ---------
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index ca9154dd..e2b1ab9 100644
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -116,6 +116,10 @@
 	status = "okay";
 };
 
+&cmt0 {
+	status = "okay";
+};
+
 &hsusb {
 	status = "okay";
 	pinctrl-0 = <&usb0_pins>;
@@ -230,6 +234,11 @@
 	};
 };
 
+&rwdt {
+	timeout-sec = <60>;
+	status = "okay";
+};
+
 &scif0 {
 	pinctrl-0 = <&scif0_pins>;
 	pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
index 0e2e033..b3fee1d 100644
--- a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
+++ b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
@@ -31,10 +31,6 @@
 	};
 };
 
-&cmt0 {
-	status = "okay";
-};
-
 &extal_clk {
 	clock-frequency = <20000000>;
 };
@@ -88,11 +84,6 @@
 	};
 };
 
-&rwdt {
-	timeout-sec = <60>;
-	status = "okay";
-};
-
 &sdhi0 {
 	pinctrl-0 = <&sdhi0_pins>;
 	pinctrl-names = "default";
-- 
2.7.4

[PATCH v2 2/5] ARM: dts: r8a7744-iwg20m: Add SPI NOR support

[Biju Das]

Add support for the SPI NOR device used to boot up the system
to the iWave RZ/G1N Qseven System On Module DT.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
V1-->V2
     * Removed compatible string "sst,sst25vf016b".
---
 arch/arm/boot/dts/r8a7744-iwg20m.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7744-iwg20m.dtsi b/arch/arm/boot/dts/r8a7744-iwg20m.dtsi
index 503583e..82ee3c1 100644
--- a/arch/arm/boot/dts/r8a7744-iwg20m.dtsi
+++ b/arch/arm/boot/dts/r8a7744-iwg20m.dtsi
@@ -36,6 +36,11 @@
 		function = "mmc";
 	};
 
+	qspi_pins: qspi {
+		groups = "qspi_ctrl", "qspi_data2";
+		function = "qspi";
+	};
+
 	sdhi0_pins: sd0 {
 		groups = "sdhi0_data4", "sdhi0_ctrl";
 		function = "sdhi0";
@@ -53,6 +58,27 @@
 	status = "okay";
 };
 
+&qspi {
+	pinctrl-0 = <&qspi_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+
+	/* WARNING - This device contains the bootloader. Handle with care. */
+	flash: flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+		spi-tx-bus-width = <2>;
+		spi-rx-bus-width = <2>;
+		m25p,fast-read;
+		spi-cpol;
+		spi-cpha;
+	};
+};
+
 &sdhi0 {
 	pinctrl-0 = <&sdhi0_pins>;
 	pinctrl-names = "default";
-- 
2.7.4

[PATCH v2 3/5] ARM: dts: r8a7744: Add DU support

[Biju Das]

Add du node to r8a7744 SoC DT. Boards that want to enable the DU
need to specify the output topology.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V1-->V2
	* Removed LVDS encoder definition from DU node.
---
 arch/arm/boot/dts/r8a7744.dtsi | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 04148d6..6a51b16 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -1645,8 +1645,14 @@
 		};
 
 		du: display@feb00000 {
-			reg = <0 0xfeb00000 0 0x40000>,
-			      <0 0xfeb90000 0 0x1c>;
+			compatible = "renesas,du-r8a7744";
+			reg = <0 0xfeb00000 0 0x40000>;
+			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 724>,
+				 <&cpg CPG_MOD 723>;
+			clock-names = "du.0", "du.1";
+			status = "disabled";
 
 			ports {
 				#address-cells = <1>;
@@ -1663,7 +1669,6 @@
 					};
 				};
 			};
-			/* placeholder */
 		};
 
 		prr: chipid@ff000044 {
-- 
2.7.4

[PATCH v2 4/5] ARM: dts: r8a7743: Remove LVDS encoder from du node

[Biju Das]

The internal LVDS encoder now has DT bindings separate from the DU.
So remove it from du node.

Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to bridge driver")

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V1-->V2
	* Removed LVDS encoder definition from DU node.
---
 arch/arm/boot/dts/r8a7743.dtsi | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 3cc33f7..3ad1efc 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1681,15 +1681,12 @@
 
 		du: display@feb00000 {
 			compatible = "renesas,du-r8a7743";
-			reg = <0 0xfeb00000 0 0x40000>,
-			      <0 0xfeb90000 0 0x1c>;
-			reg-names = "du", "lvds.0";
+			reg = <0 0xfeb00000 0 0x40000>;
 			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 724>,
-				 <&cpg CPG_MOD 723>,
-				 <&cpg CPG_MOD 726>;
-			clock-names = "du.0", "du.1", "lvds.0";
+				 <&cpg CPG_MOD 723>;
+			clock-names = "du.0", "du.1";
 			status = "disabled";
 
 			ports {
-- 
2.7.4

[PATCH v2 5/5] ARM: dts: r8a7744: Fix sorting of vsp and msiof nodes

[Biju Das]

This patch fixes sorting of vsp and msiof nodes.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
V1-->V2
  * No change. It is a new patch.
---
 arch/arm/boot/dts/r8a7744.dtsi | 150 ++++++++++++++++++++---------------------
 1 file changed, 75 insertions(+), 75 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 6a51b16..83804aa 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -998,6 +998,54 @@
 			status = "disabled";
 		};
 
+		msiof0: spi@e6e20000 {
+			compatible = "renesas,msiof-r8a7744",
+				     "renesas,rcar-gen2-msiof";
+			reg = <0 0xe6e20000 0 0x0064>;
+			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 000>;
+			dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+			       <&dmac1 0x51>, <&dmac1 0x52>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			resets = <&cpg 000>;
+			status = "disabled";
+		};
+
+		msiof1: spi@e6e10000 {
+			compatible = "renesas,msiof-r8a7744",
+				     "renesas,rcar-gen2-msiof";
+			reg = <0 0xe6e10000 0 0x0064>;
+			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 208>;
+			dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+			       <&dmac1 0x55>, <&dmac1 0x56>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			resets = <&cpg 208>;
+			status = "disabled";
+		};
+
+		msiof2: spi@e6e00000 {
+			compatible = "renesas,msiof-r8a7744",
+				     "renesas,rcar-gen2-msiof";
+			reg = <0 0xe6e00000 0 0x0064>;
+			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 205>;
+			dmas = <&dmac0 0x41>, <&dmac0 0x42>,
+			       <&dmac1 0x41>, <&dmac1 0x42>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			resets = <&cpg 205>;
+			status = "disabled";
+		};
+
 		pwm0: pwm@e6e30000 {
 			compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
 			reg = <0 0xe6e30000 0 0x8>;
@@ -1068,54 +1116,6 @@
 			status = "disabled";
 		};
 
-		msiof0: spi@e6e20000 {
-			compatible = "renesas,msiof-r8a7744",
-				     "renesas,rcar-gen2-msiof";
-			reg = <0 0xe6e20000 0 0x0064>;
-			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 000>;
-			dmas = <&dmac0 0x51>, <&dmac0 0x52>,
-			       <&dmac1 0x51>, <&dmac1 0x52>;
-			dma-names = "tx", "rx", "tx", "rx";
-			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			resets = <&cpg 000>;
-			status = "disabled";
-		};
-
-		msiof1: spi@e6e10000 {
-			compatible = "renesas,msiof-r8a7744",
-				     "renesas,rcar-gen2-msiof";
-			reg = <0 0xe6e10000 0 0x0064>;
-			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 208>;
-			dmas = <&dmac0 0x55>, <&dmac0 0x56>,
-			       <&dmac1 0x55>, <&dmac1 0x56>;
-			dma-names = "tx", "rx", "tx", "rx";
-			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			resets = <&cpg 208>;
-			status = "disabled";
-		};
-
-		msiof2: spi@e6e00000 {
-			compatible = "renesas,msiof-r8a7744",
-				     "renesas,rcar-gen2-msiof";
-			reg = <0 0xe6e00000 0 0x0064>;
-			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 205>;
-			dmas = <&dmac0 0x41>, <&dmac0 0x42>,
-			       <&dmac1 0x41>, <&dmac1 0x42>;
-			dma-names = "tx", "rx", "tx", "rx";
-			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			resets = <&cpg 205>;
-			status = "disabled";
-		};
-
 		can0: can@e6e80000 {
 			compatible = "renesas,can-r8a7744",
 				     "renesas,rcar-gen2-can";
@@ -1589,33 +1589,6 @@
 			resets = <&cpg 408>;
 		};
 
-		vsp@fe928000 {
-			compatible = "renesas,vsp1";
-			reg = <0 0xfe928000 0 0x8000>;
-			interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 131>;
-			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
-			resets = <&cpg 131>;
-		};
-
-		vsp@fe930000 {
-			compatible = "renesas,vsp1";
-			reg = <0 0xfe930000 0 0x8000>;
-			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 128>;
-			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
-			resets = <&cpg 128>;
-		};
-
-		vsp@fe938000 {
-			compatible = "renesas,vsp1";
-			reg = <0 0xfe938000 0 0x8000>;
-			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 127>;
-			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
-			resets = <&cpg 127>;
-		};
-
 		pciec: pcie@fe000000 {
 			compatible = "renesas,pcie-r8a7744",
 				     "renesas,pcie-rcar-gen2";
@@ -1644,6 +1617,33 @@
 			status = "disabled";
 		};
 
+		vsp@fe928000 {
+			compatible = "renesas,vsp1";
+			reg = <0 0xfe928000 0 0x8000>;
+			interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 131>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 131>;
+		};
+
+		vsp@fe930000 {
+			compatible = "renesas,vsp1";
+			reg = <0 0xfe930000 0 0x8000>;
+			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 128>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 128>;
+		};
+
+		vsp@fe938000 {
+			compatible = "renesas,vsp1";
+			reg = <0 0xfe938000 0 0x8000>;
+			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 127>;
+			power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+			resets = <&cpg 127>;
+		};
+
 		du: display@feb00000 {
 			compatible = "renesas,du-r8a7744";
 			reg = <0 0xfeb00000 0 0x40000>;
-- 
2.7.4

Re: [PATCH v2 1/5] ARM: dts: iwg20d-q7-common: Move cmt/rwdt node out of RZ/G1M SOM

[Simon Horman]

On Wed, Dec 05, 2018 at 09:06:51AM +0000, Biju Das wrote:
> The iWave RZ/G1N board is almost identical to RZ/G1M. cmt and rwdt modules
> are SoC specific and should be part of board dts rather than SoM dtsi. By
> moving these nodes to the common dtsi it allows cmt and rwdt to be enabled
> on both of these boards with less lines of code.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, I have this in my tree for v4.21.

Re: [PATCH v2 2/5] ARM: dts: r8a7744-iwg20m: Add SPI NOR support

[Simon Horman]

On Wed, Dec 05, 2018 at 09:06:52AM +0000, Biju Das wrote:
> Add support for the SPI NOR device used to boot up the system
> to the iWave RZ/G1N Qseven System On Module DT.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> V1-->V2
>      * Removed compatible string "sst,sst25vf016b".

Thanks, applied for v4.21.

Re: [PATCH v2 3/5] ARM: dts: r8a7744: Add DU support

[Simon Horman]

On Wed, Dec 05, 2018 at 09:06:53AM +0000, Biju Das wrote:
> Add du node to r8a7744 SoC DT. Boards that want to enable the DU
> need to specify the output topology.
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> ---
> V1-->V2
> 	* Removed LVDS encoder definition from DU node.

I would like this and the remaining patches in this series to
receive some review before I apply them. This likely means they
will be accepted for v4.22 as I am planning to close the
renesas tree for non-bugfixes for v4.21 later today.

b

> ---
>  arch/arm/boot/dts/r8a7744.dtsi | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
> index 04148d6..6a51b16 100644
> --- a/arch/arm/boot/dts/r8a7744.dtsi
> +++ b/arch/arm/boot/dts/r8a7744.dtsi
> @@ -1645,8 +1645,14 @@
>  		};
>  
>  		du: display@feb00000 {
> -			reg = <0 0xfeb00000 0 0x40000>,
> -			      <0 0xfeb90000 0 0x1c>;
> +			compatible = "renesas,du-r8a7744";
> +			reg = <0 0xfeb00000 0 0x40000>;
> +			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 724>,
> +				 <&cpg CPG_MOD 723>;
> +			clock-names = "du.0", "du.1";
> +			status = "disabled";
>  
>  			ports {
>  				#address-cells = <1>;
> @@ -1663,7 +1669,6 @@
>  					};
>  				};
>  			};
> -			/* placeholder */
>  		};
>  
>  		prr: chipid@ff000044 {
> -- 
> 2.7.4
> 

Re: [PATCH v2 5/5] ARM: dts: r8a7744: Fix sorting of vsp and msiof nodes

[Geert Uytterhoeven]

On Wed, Dec 5, 2018 at 10:15 AM Biju Das <biju.das@bp.renesas.com> wrote:
> This patch fixes sorting of vsp and msiof nodes.
>
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 5/5] ARM: dts: r8a7744: Fix sorting of vsp and msiof nodes

[Simon Horman]

On Mon, Dec 10, 2018 at 01:31:40PM +0100, Geert Uytterhoeven wrote:
> On Wed, Dec 5, 2018 at 10:15 AM Biju Das <biju.das@bp.renesas.com> wrote:
> > This patch fixes sorting of vsp and msiof nodes.
> >
> > Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, applied for v4.22.

Re: [PATCH v2 4/5] ARM: dts: r8a7743: Remove LVDS encoder from du node

[Geert Uytterhoeven]

Hi Biju,

On Wed, Dec 5, 2018 at 10:15 AM Biju Das <biju.das@bp.renesas.com> wrote:
> The internal LVDS encoder now has DT bindings separate from the DU.
> So remove it from du node.
>
> Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to bridge driver")
>
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks for your patch!

> ---
> V1-->V2
>         * Removed LVDS encoder definition from DU node.

Shouldn't you add a new node for the LVDS encoder?

> ---
>  arch/arm/boot/dts/r8a7743.dtsi | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
> index 3cc33f7..3ad1efc 100644
> --- a/arch/arm/boot/dts/r8a7743.dtsi
> +++ b/arch/arm/boot/dts/r8a7743.dtsi
> @@ -1681,15 +1681,12 @@
>
>                 du: display@feb00000 {
>                         compatible = "renesas,du-r8a7743";
> -                       reg = <0 0xfeb00000 0 0x40000>,
> -                             <0 0xfeb90000 0 0x1c>;
> -                       reg-names = "du", "lvds.0";
> +                       reg = <0 0xfeb00000 0 0x40000>;
>                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
>                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
>                         clocks = <&cpg CPG_MOD 724>,
> -                                <&cpg CPG_MOD 723>,
> -                                <&cpg CPG_MOD 726>;
> -                       clock-names = "du.0", "du.1", "lvds.0";
> +                                <&cpg CPG_MOD 723>;
> +                       clock-names = "du.0", "du.1";
>                         status = "disabled";
>
>                         ports {

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 3/5] ARM: dts: r8a7744: Add DU support

[Geert Uytterhoeven]

Hi Biju,

On Wed, Dec 5, 2018 at 10:15 AM Biju Das <biju.das@bp.renesas.com> wrote:
> Add du node to r8a7744 SoC DT. Boards that want to enable the DU
> need to specify the output topology.
>
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks for your patch!

> ---
> V1-->V2
>         * Removed LVDS encoder definition from DU node.

Shouldn't you add a new node for the LVDS encoder?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH v2 4/5] ARM: dts: r8a7743: Remove LVDS encoder from du node

[Biju Das]

Hi Geert,

Thanks for the feedback.

> Subject: Re: [PATCH v2 4/5] ARM: dts: r8a7743: Remove LVDS encoder from
> du node
>
> Hi Biju,
>
> On Wed, Dec 5, 2018 at 10:15 AM Biju Das <biju.das@bp.renesas.com>
> wrote:
> > The internal LVDS encoder now has DT bindings separate from the DU.
> > So remove it from du node.
> >
> > Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to
> > bridge driver")
> >
> > Signed-off-by: Biju Das <biju.das@bp.renesas.com>
>
> Thanks for your patch!
>
> > ---
> > V1-->V2
> >         * Removed LVDS encoder definition from DU node.
>
> Shouldn't you add a new node for the LVDS encoder?

Yes for Soc Dtsi , I will add the new node for LVDS encoder.

Regards,
Biju
> > ---
> >  arch/arm/boot/dts/r8a7743.dtsi | 9 +++------
> >  1 file changed, 3 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/r8a7743.dtsi
> > b/arch/arm/boot/dts/r8a7743.dtsi index 3cc33f7..3ad1efc 100644
> > --- a/arch/arm/boot/dts/r8a7743.dtsi
> > +++ b/arch/arm/boot/dts/r8a7743.dtsi
> > @@ -1681,15 +1681,12 @@
> >
> >                 du: display@feb00000 {
> >                         compatible = "renesas,du-r8a7743";
> > -                       reg = <0 0xfeb00000 0 0x40000>,
> > -                             <0 0xfeb90000 0 0x1c>;
> > -                       reg-names = "du", "lvds.0";
> > +                       reg = <0 0xfeb00000 0 0x40000>;
> >                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> >                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> >                         clocks = <&cpg CPG_MOD 724>,
> > -                                <&cpg CPG_MOD 723>,
> > -                                <&cpg CPG_MOD 726>;
> > -                       clock-names = "du.0", "du.1", "lvds.0";
> > +                                <&cpg CPG_MOD 723>;
> > +                       clock-names = "du.0", "du.1";
> >                         status = "disabled";
> >
> >                         ports {
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds



Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

RE: [PATCH v2 3/5] ARM: dts: r8a7744: Add DU support

[Biju Das]

Hi Geert,

Thanks for the feedback.

> Subject: Re: [PATCH v2 3/5] ARM: dts: r8a7744: Add DU support
>
> Hi Biju,
>
> On Wed, Dec 5, 2018 at 10:15 AM Biju Das <biju.das@bp.renesas.com>
> wrote:
> > Add du node to r8a7744 SoC DT. Boards that want to enable the DU need
> > to specify the output topology.
> >
> > Signed-off-by: Biju Das <biju.das@bp.renesas.com>
>
> Thanks for your patch!
>
> > ---
> > V1-->V2
> >         * Removed LVDS encoder definition from DU node.
>
> Shouldn't you add a new node for the LVDS encoder?

Yes, I will add the new node for LVDS encoder for SoC dtsi.

Regards,
Biju



Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

Re: [PATCH v2 4/5] ARM: dts: r8a7743: Remove LVDS encoder from du node

[Simon Horman]

On Thu, Jan 03, 2019 at 02:34:39PM +0000, Biju Das wrote:
> Hi Geert,
> 
> Thanks for the feedback.
> 
> > Subject: Re: [PATCH v2 4/5] ARM: dts: r8a7743: Remove LVDS encoder from
> > du node
> >
> > Hi Biju,
> >
> > On Wed, Dec 5, 2018 at 10:15 AM Biju Das <biju.das@bp.renesas.com>
> > wrote:
> > > The internal LVDS encoder now has DT bindings separate from the DU.
> > > So remove it from du node.
> > >
> > > Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to
> > > bridge driver")
> > >
> > > Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> >
> > Thanks for your patch!
> >
> > > ---
> > > V1-->V2
> > >         * Removed LVDS encoder definition from DU node.
> >
> > Shouldn't you add a new node for the LVDS encoder?
> 
> Yes for Soc Dtsi , I will add the new node for LVDS encoder.

Can I clarify that I should wait for a fresh revision of this
and the following patch?

> Regards,
> Biju
> > > ---
> > >  arch/arm/boot/dts/r8a7743.dtsi | 9 +++------
> > >  1 file changed, 3 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/arch/arm/boot/dts/r8a7743.dtsi
> > > b/arch/arm/boot/dts/r8a7743.dtsi index 3cc33f7..3ad1efc 100644
> > > --- a/arch/arm/boot/dts/r8a7743.dtsi
> > > +++ b/arch/arm/boot/dts/r8a7743.dtsi
> > > @@ -1681,15 +1681,12 @@
> > >
> > >                 du: display@feb00000 {
> > >                         compatible = "renesas,du-r8a7743";
> > > -                       reg = <0 0xfeb00000 0 0x40000>,
> > > -                             <0 0xfeb90000 0 0x1c>;
> > > -                       reg-names = "du", "lvds.0";
> > > +                       reg = <0 0xfeb00000 0 0x40000>;
> > >                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> > >                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> > >                         clocks = <&cpg CPG_MOD 724>,
> > > -                                <&cpg CPG_MOD 723>,
> > > -                                <&cpg CPG_MOD 726>;
> > > -                       clock-names = "du.0", "du.1", "lvds.0";
> > > +                                <&cpg CPG_MOD 723>;
> > > +                       clock-names = "du.0", "du.1";
> > >                         status = "disabled";
> > >
> > >                         ports {
> >
> > Gr{oetje,eeting}s,
> >
> >                         Geert
> >
> > --
> > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> > m68k.org
> >
> > In personal conversations with technical people, I call myself a hacker. But
> > when I'm talking to journalists I just say "programmer" or something like that.
> >                                 -- Linus Torvalds
> 
> 
> 
> Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

RE: [PATCH v2 4/5] ARM: dts: r8a7743: Remove LVDS encoder from du node

[Biju Das]

Hi Simon,

Thanks for the feedback.

> Subject: Re: [PATCH v2 4/5] ARM: dts: r8a7743: Remove LVDS encoder from
> du node
>
> On Thu, Jan 03, 2019 at 02:34:39PM +0000, Biju Das wrote:
> > Hi Geert,
> >
> > Thanks for the feedback.
> >
> > > Subject: Re: [PATCH v2 4/5] ARM: dts: r8a7743: Remove LVDS encoder
> > > from du node
> > >
> > > Hi Biju,
> > >
> > > On Wed, Dec 5, 2018 at 10:15 AM Biju Das <biju.das@bp.renesas.com>
> > > wrote:
> > > > The internal LVDS encoder now has DT bindings separate from the DU.
> > > > So remove it from du node.
> > > >
> > > > Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to
> > > > bridge driver")
> > > >
> > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> > >
> > > Thanks for your patch!
> > >
> > > > ---
> > > > V1-->V2
> > > >         * Removed LVDS encoder definition from DU node.
> > >
> > > Shouldn't you add a new node for the LVDS encoder?
> >
> > Yes for Soc Dtsi , I will add the new node for LVDS encoder.
>
> Can I clarify that I should wait for a fresh revision of this and the following
> patch?

My original plan was to submit LVDS encoder patch as separate one.

But now we are agreeing for adding  LVDS encoder node as part of the fix (Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to bridge driver")
So I will send V3 with this change.

Regards,
Biju
> > > > ---
> > > >  arch/arm/boot/dts/r8a7743.dtsi | 9 +++------
> > > >  1 file changed, 3 insertions(+), 6 deletions(-)
> > > >
> > > > diff --git a/arch/arm/boot/dts/r8a7743.dtsi
> > > > b/arch/arm/boot/dts/r8a7743.dtsi index 3cc33f7..3ad1efc 100644
> > > > --- a/arch/arm/boot/dts/r8a7743.dtsi
> > > > +++ b/arch/arm/boot/dts/r8a7743.dtsi
> > > > @@ -1681,15 +1681,12 @@
> > > >
> > > >                 du: display@feb00000 {
> > > >                         compatible = "renesas,du-r8a7743";
> > > > -                       reg = <0 0xfeb00000 0 0x40000>,
> > > > -                             <0 0xfeb90000 0 0x1c>;
> > > > -                       reg-names = "du", "lvds.0";
> > > > +                       reg = <0 0xfeb00000 0 0x40000>;
> > > >                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
> > > >                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
> > > >                         clocks = <&cpg CPG_MOD 724>,
> > > > -                                <&cpg CPG_MOD 723>,
> > > > -                                <&cpg CPG_MOD 726>;
> > > > -                       clock-names = "du.0", "du.1", "lvds.0";
> > > > +                                <&cpg CPG_MOD 723>;
> > > > +                       clock-names = "du.0", "du.1";
> > > >                         status = "disabled";
> > > >
> > > >                         ports {
> > >
> > > Gr{oetje,eeting}s,
> > >
> > >                         Geert
> > >
> > > --
> > > Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> > > geert@linux- m68k.org
> > >
> > > In personal conversations with technical people, I call myself a
> > > hacker. But when I'm talking to journalists I just say "programmer" or
> something like that.
> > >                                 -- Linus Torvalds
> >
> >
> >
> > Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne
> End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under
> Registered No. 04586709.



Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

Re: [PATCH v2 4/5] ARM: dts: r8a7743: Remove LVDS encoder from du node

[Simon Horman]

On Fri, Jan 04, 2019 at 10:02:02AM +0000, Biju Das wrote:
> Hi Simon,
> 
> Thanks for the feedback.
> 
> > Subject: Re: [PATCH v2 4/5] ARM: dts: r8a7743: Remove LVDS encoder from
> > du node
> >
> > On Thu, Jan 03, 2019 at 02:34:39PM +0000, Biju Das wrote:
> > > Hi Geert,
> > >
> > > Thanks for the feedback.
> > >
> > > > Subject: Re: [PATCH v2 4/5] ARM: dts: r8a7743: Remove LVDS encoder
> > > > from du node
> > > >
> > > > Hi Biju,
> > > >
> > > > On Wed, Dec 5, 2018 at 10:15 AM Biju Das <biju.das@bp.renesas.com>
> > > > wrote:
> > > > > The internal LVDS encoder now has DT bindings separate from the DU.
> > > > > So remove it from du node.
> > > > >
> > > > > Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to
> > > > > bridge driver")
> > > > >
> > > > > Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> > > >
> > > > Thanks for your patch!
> > > >
> > > > > ---
> > > > > V1-->V2
> > > > >         * Removed LVDS encoder definition from DU node.
> > > >
> > > > Shouldn't you add a new node for the LVDS encoder?
> > >
> > > Yes for Soc Dtsi , I will add the new node for LVDS encoder.
> >
> > Can I clarify that I should wait for a fresh revision of this and the following
> > patch?
> 
> My original plan was to submit LVDS encoder patch as separate one.
> 
> But now we are agreeing for adding  LVDS encoder node as part of the fix (Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to bridge driver")
> So I will send V3 with this change.

Great, thanks!