From: Simon Horman <horms@verge.net.au>
To: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Linus Walleij <linus.walleij@linaro.org>,
linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
Takeshi Kihara <takeshi.kihara.df@renesas.com>
Subject: Re: [PATCH] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2
Date: Fri, 11 Jan 2019 13:36:44 +0100 [thread overview]
Message-ID: <20190111123643.6b5grpmpx4iy4a7z@verge.net.au> (raw)
In-Reply-To: <20190111121224.31007-1-geert+renesas@glider.be>
On Fri, Jan 11, 2019 at 01:12:24PM +0100, Geert Uytterhoeven wrote:
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
>
> According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
> Aug 24, 2018, the MOD_SEL0 bit2 is set when RX2_{A,B}, TX2_{A,B} and
> SCK2_A pin functions are selected.
>
> Fixes: 6d4036a1e3b3ac0f ("pinctrl: sh-pfc: Initial R8A77990 PFC support")
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> To be queued in sh-pfc-for-v5.1.
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
prev parent reply other threads:[~2019-01-11 12:36 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-11 12:12 [PATCH] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2 Geert Uytterhoeven
2019-01-11 12:36 ` Simon Horman [this message]
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