From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72385C04AB4 for ; Tue, 14 May 2019 15:13:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4A1C52085A for ; Tue, 14 May 2019 15:13:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725980AbfENPNL (ORCPT ); Tue, 14 May 2019 11:13:11 -0400 Received: from pbmsgap01.intersil.com ([192.157.179.201]:51722 "EHLO pbmsgap01.intersil.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725901AbfENPNK (ORCPT ); Tue, 14 May 2019 11:13:10 -0400 Received: from pps.filterd (pbmsgap01.intersil.com [127.0.0.1]) by pbmsgap01.intersil.com (8.16.0.27/8.16.0.27) with SMTP id x4EEqfmh026046; Tue, 14 May 2019 10:58:18 -0400 Received: from pbmxdp01.intersil.corp (pbmxdp01.pb.intersil.com [132.158.200.222]) by pbmsgap01.intersil.com with ESMTP id 2sdswyjjrm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 14 May 2019 10:58:18 -0400 Received: from pbmxdp02.intersil.corp (132.158.200.223) by pbmxdp01.intersil.corp (132.158.200.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.1531.3; Tue, 14 May 2019 10:58:17 -0400 Received: from localhost.localdomain (132.158.202.108) by pbmxdp02.intersil.corp (132.158.200.223) with Microsoft SMTP Server id 15.1.1531.3 via Frontend Transport; Tue, 14 May 2019 10:58:16 -0400 From: Chris Brandt To: Rob Herring , Mark Rutland , Greg Kroah-Hartman , Simon Horman , Yoshihiro Shimoda CC: Geert Uytterhoeven , Sergei Shtylyov , Chunfeng Yun , , , , "Chris Brandt" Subject: [PATCH v3 13/15] ARM: dts: r7s9210: Add USB Host support Date: Tue, 14 May 2019 09:56:03 -0500 Message-ID: <20190514145605.19112-14-chris.brandt@renesas.com> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20190514145605.19112-1-chris.brandt@renesas.com> References: <20190514145605.19112-1-chris.brandt@renesas.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-05-14_09:,, signatures=0 X-Proofpoint-Spam-Details: rule=junk_notspam policy=junk score=0 suspectscore=2 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905140106 X-Proofpoint-Spam-Reason: mlx Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add EHCI and OHCI host support for RZ/A2. Signed-off-by: Chris Brandt --- v3: * add usb_x1 as a clock source * add clock-names v2: * changed to generic name usb@xxx * Add space between compatible strings --- arch/arm/boot/dts/r7s9210.dtsi | 66 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/arch/arm/boot/dts/r7s9210.dtsi b/arch/arm/boot/dts/r7s9210.dtsi index 73041f04fef5..c3a50206ff86 100644 --- a/arch/arm/boot/dts/r7s9210.dtsi +++ b/arch/arm/boot/dts/r7s9210.dtsi @@ -329,6 +329,72 @@ status = "disabled"; }; + ohci0: usb@e8218000 { + compatible = "generic-ohci"; + reg = <0xe8218000 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 61>; + phys = <&usb2_phy0>; + phy-names = "usb"; + power-domains = <&cpg>; + status = "disabled"; + }; + + ehci0: usb@e8218100 { + compatible = "generic-ehci"; + reg = <0xe8218100 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 61>; + phys = <&usb2_phy0>; + phy-names = "usb"; + power-domains = <&cpg>; + status = "disabled"; + }; + + usb2_phy0: usb-phy@e8218200 { + compatible = "renesas,usb2-phy-r7s9210", "renesas,rcar-gen3-usb2-phy"; + reg = <0xe8218200 0x10>; + interrupts = ; + clocks = <&cpg CPG_MOD 61>, <&usb_x1_clk>; + clock-names = "fclk", "usb_x1"; + power-domains = <&cpg>; + #phy-cells = <0>; + status = "disabled"; + }; + + ohci1: usb@e821a000 { + compatible = "generic-ohci"; + reg = <0xe821a000 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 60>; + phys = <&usb2_phy1>; + phy-names = "usb"; + power-domains = <&cpg>; + status = "disabled"; + }; + + ehci1: usb@e821a100 { + compatible = "generic-ehci"; + reg = <0xe821a100 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 60>; + phys = <&usb2_phy1>; + phy-names = "usb"; + power-domains = <&cpg>; + status = "disabled"; + }; + + usb2_phy1: usb-phy@e821a200 { + compatible = "renesas,usb2-phy-r7s9210", "renesas,rcar-gen3-usb2-phy"; + reg = <0xe821a200 0x10>; + interrupts = ; + clocks = <&cpg CPG_MOD 60>, <&usb_x1_clk>; + clock-names = "fclk", "usb_x1"; + power-domains = <&cpg>; + #phy-cells = <0>; + status = "disabled"; + }; + sdhi0: sd@e8228000 { compatible = "renesas,sdhi-r7s9210"; reg = <0xe8228000 0x8c0>; -- 2.16.1