From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A428FC04AB4 for ; Tue, 14 May 2019 15:05:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7ADD02084E for ; Tue, 14 May 2019 15:05:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726036AbfENPFL (ORCPT ); Tue, 14 May 2019 11:05:11 -0400 Received: from pbmsgap02.intersil.com ([192.157.179.202]:35242 "EHLO pbmsgap02.intersil.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725854AbfENPFL (ORCPT ); Tue, 14 May 2019 11:05:11 -0400 X-Greylist: delayed 501 seconds by postgrey-1.27 at vger.kernel.org; Tue, 14 May 2019 11:05:11 EDT Received: from pps.filterd (pbmsgap02.intersil.com [127.0.0.1]) by pbmsgap02.intersil.com (8.16.0.27/8.16.0.27) with SMTP id x4EEqoie023052; Tue, 14 May 2019 10:57:09 -0400 Received: from pbmxdp03.intersil.corp (pbmxdp03.pb.intersil.com [132.158.200.224]) by pbmsgap02.intersil.com with ESMTP id 2sdrjcabxr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 14 May 2019 10:57:09 -0400 Received: from pbmxdp02.intersil.corp (132.158.200.223) by pbmxdp03.intersil.corp (132.158.200.224) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.1531.3; Tue, 14 May 2019 10:57:08 -0400 Received: from localhost.localdomain (132.158.202.108) by pbmxdp02.intersil.corp (132.158.200.223) with Microsoft SMTP Server id 15.1.1531.3 via Frontend Transport; Tue, 14 May 2019 10:57:07 -0400 From: Chris Brandt To: Rob Herring , Mark Rutland , Greg Kroah-Hartman , Simon Horman , Yoshihiro Shimoda CC: Geert Uytterhoeven , Sergei Shtylyov , Chunfeng Yun , , , , "Chris Brandt" Subject: [PATCH v3 04/15] dt-bindings: rcar-gen3-phy-usb2: Document use of usb_x1 Date: Tue, 14 May 2019 09:55:54 -0500 Message-ID: <20190514145605.19112-5-chris.brandt@renesas.com> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20190514145605.19112-1-chris.brandt@renesas.com> References: <20190514145605.19112-1-chris.brandt@renesas.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-05-14_09:,, signatures=0 X-Proofpoint-Spam-Details: rule=junk_notspam policy=junk score=0 suspectscore=2 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=805 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905140106 X-Proofpoint-Spam-Reason: mlx Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Document the USB_X1 input and add clock-names to identify functional and USB_X1 clocks. Signed-off-by: Chris Brandt --- v3: * added clock names v2: * removed 'use_usb_x1' option * document that 'usb_x1' clock node will be detected to determine if 48MHz clock exists --- Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt index d46188f450bf..ca8a831d4273 100644 --- a/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt +++ b/Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt @@ -28,7 +28,11 @@ Required properties: followed by the generic version. - reg: offset and length of the partial USB 2.0 Host register block. -- clocks: clock phandle and specifier pair(s). +- clocks: clock phandle and specifier pair(s). For SoCs that have a separate + dedicated USB_X1 input for the PLL, that is also listed. +- clock-names: Name of the clocks. The functional clock shall be called "fclk" + and USB_X1 shall be called "usb_x1". If only one clock is listed, + this property is not required. - #phy-cells: see phy-bindings.txt in the same directory, must be <1> (and using <0> is deprecated). -- 2.16.1