* [PATCH v3 0/3] Renesas RZ/G2L CANFD support
@ 2021-07-21 19:49 Lad Prabhakar
2021-07-21 19:49 ` [PATCH v3 1/3] dt-bindings: net: can: renesas,rcar-canfd: Document RZ/G2L SoC Lad Prabhakar
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Lad Prabhakar @ 2021-07-21 19:49 UTC (permalink / raw)
To: Geert Uytterhoeven, Rob Herring, Fabrizio Castro,
Wolfgang Grandegger, Marc Kleine-Budde, David S. Miller,
Jakub Kicinski, Philipp Zabel, linux-can, netdev, devicetree
Cc: linux-kernel, linux-renesas-soc, Prabhakar, Biju Das, Lad Prabhakar
Hi All,
This patch series adds CANFD support to Renesas RZ/G2L family.
CANFD block on RZ/G2L SoC is almost identical to one found on
R-Car Gen3 SoC's. On RZ/G2L SoC interrupt sources for each channel
are split into individual sources.
Cheers,
Prabhakar
Changes for v3:
* Dropped core clock addition patches from this series (its queued
up already in renesas-clk-for-v5.15)
* Added reset-names in binding doc as suggested by Philipp
* Updated interrupt names in binding doc as suggested by Geert
* Updated the driver to handle the above DT binding changes
Changes for v2:
* Added interrupt-names property and marked it as required for
RZ/G2L family
* Added descriptions for reset property
* Re-used irq handlers on RZ/G2L SoC
* Added new enum for chip_id
* Dropped R9A07G044_LAST_CORE_CLK
* Dropped patch (clk: renesas: r9a07g044-cpg: Add clock and reset
entries for CANFD) as its been merged into renesas tree
Lad Prabhakar (3):
dt-bindings: net: can: renesas,rcar-canfd: Document RZ/G2L SoC
can: rcar_canfd: Add support for RZ/G2L family
arm64: dts: renesas: r9a07g044: Add CANFD node
.../bindings/net/can/renesas,rcar-canfd.yaml | 69 ++++++-
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 41 +++++
drivers/net/can/rcar/rcar_canfd.c | 173 +++++++++++++++---
3 files changed, 253 insertions(+), 30 deletions(-)
--
2.17.1
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v3 1/3] dt-bindings: net: can: renesas,rcar-canfd: Document RZ/G2L SoC 2021-07-21 19:49 [PATCH v3 0/3] Renesas RZ/G2L CANFD support Lad Prabhakar @ 2021-07-21 19:49 ` Lad Prabhakar 2021-07-26 22:46 ` Rob Herring 2021-07-21 19:49 ` [PATCH v3 2/3] can: rcar_canfd: Add support for RZ/G2L family Lad Prabhakar 2021-07-21 19:49 ` [PATCH v3 3/3] arm64: dts: renesas: r9a07g044: Add CANFD node Lad Prabhakar 2 siblings, 1 reply; 7+ messages in thread From: Lad Prabhakar @ 2021-07-21 19:49 UTC (permalink / raw) To: Geert Uytterhoeven, Rob Herring, Fabrizio Castro, Wolfgang Grandegger, Marc Kleine-Budde, David S. Miller, Jakub Kicinski, Philipp Zabel, linux-can, netdev, devicetree Cc: linux-kernel, linux-renesas-soc, Prabhakar, Biju Das, Lad Prabhakar Add CANFD binding documentation for Renesas RZ/G2L SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> --- .../bindings/net/can/renesas,rcar-canfd.yaml | 69 +++++++++++++++++-- 1 file changed, 63 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml index 0b33ba9ccb47..546c6e6d2fb0 100644 --- a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml +++ b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml @@ -30,13 +30,15 @@ properties: - renesas,r8a77995-canfd # R-Car D3 - const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2 + - items: + - enum: + - renesas,r9a07g044-canfd # RZ/G2{L,LC} + - const: renesas,rzg2l-canfd # RZ/G2L family + reg: maxItems: 1 - interrupts: - items: - - description: Channel interrupt - - description: Global interrupt + interrupts: true clocks: maxItems: 3 @@ -50,8 +52,7 @@ properties: power-domains: maxItems: 1 - resets: - maxItems: 1 + resets: true renesas,no-can-fd: $ref: /schemas/types.yaml#/definitions/flag @@ -91,6 +92,62 @@ required: - channel0 - channel1 +if: + properties: + compatible: + contains: + enum: + - renesas,rzg2l-canfd +then: + properties: + interrupts: + items: + - description: CAN global error interrupt + - description: CAN receive FIFO interrupt + - description: CAN0 error interrupt + - description: CAN0 transmit interrupt + - description: CAN0 transmit/receive FIFO receive completion interrupt + - description: CAN1 error interrupt + - description: CAN1 transmit interrupt + - description: CAN1 transmit/receive FIFO receive completion interrupt + + interrupt-names: + items: + - const: g_err + - const: g_recc + - const: ch0_err + - const: ch0_rec + - const: ch0_trx + - const: ch1_err + - const: ch1_rec + - const: ch1_trx + + resets: + maxItems: 2 + + reset-names: + items: + - const: rstp_n + - const: rstc_n + + required: + - interrupt-names + - reset-names +else: + properties: + interrupts: + items: + - description: Channel interrupt + - description: Global interrupt + + interrupt-names: + items: + - const: ch_int + - const: g_int + + resets: + maxItems: 1 + unevaluatedProperties: false examples: -- 2.17.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v3 1/3] dt-bindings: net: can: renesas,rcar-canfd: Document RZ/G2L SoC 2021-07-21 19:49 ` [PATCH v3 1/3] dt-bindings: net: can: renesas,rcar-canfd: Document RZ/G2L SoC Lad Prabhakar @ 2021-07-26 22:46 ` Rob Herring 0 siblings, 0 replies; 7+ messages in thread From: Rob Herring @ 2021-07-26 22:46 UTC (permalink / raw) To: Lad Prabhakar Cc: Wolfgang Grandegger, Jakub Kicinski, Philipp Zabel, Biju Das, devicetree, Geert Uytterhoeven, linux-renesas-soc, Prabhakar, David S. Miller, Marc Kleine-Budde, Fabrizio Castro, linux-can, netdev, Rob Herring, linux-kernel On Wed, 21 Jul 2021 20:49:49 +0100, Lad Prabhakar wrote: > Add CANFD binding documentation for Renesas RZ/G2L SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > .../bindings/net/can/renesas,rcar-canfd.yaml | 69 +++++++++++++++++-- > 1 file changed, 63 insertions(+), 6 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 2/3] can: rcar_canfd: Add support for RZ/G2L family 2021-07-21 19:49 [PATCH v3 0/3] Renesas RZ/G2L CANFD support Lad Prabhakar 2021-07-21 19:49 ` [PATCH v3 1/3] dt-bindings: net: can: renesas,rcar-canfd: Document RZ/G2L SoC Lad Prabhakar @ 2021-07-21 19:49 ` Lad Prabhakar 2021-07-26 9:53 ` Geert Uytterhoeven 2021-07-21 19:49 ` [PATCH v3 3/3] arm64: dts: renesas: r9a07g044: Add CANFD node Lad Prabhakar 2 siblings, 1 reply; 7+ messages in thread From: Lad Prabhakar @ 2021-07-21 19:49 UTC (permalink / raw) To: Geert Uytterhoeven, Rob Herring, Fabrizio Castro, Wolfgang Grandegger, Marc Kleine-Budde, David S. Miller, Jakub Kicinski, Philipp Zabel, linux-can, netdev, devicetree Cc: linux-kernel, linux-renesas-soc, Prabhakar, Biju Das, Lad Prabhakar CANFD block on RZ/G2L SoC is almost identical to one found on R-Car Gen3 SoC's. On RZ/G2L SoC interrupt sources for each channel are split into different sources and the IP doesn't divide (1/2) CANFD clock within the IP. This patch adds compatible string for RZ/G2L family and registers the irq handlers required for CANFD operation. IRQ numbers are now fetched based on names instead of indices. For backward compatibility on non RZ/G2L SoC's we fallback reading based on indices. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> --- drivers/net/can/rcar/rcar_canfd.c | 173 +++++++++++++++++++++++++----- 1 file changed, 149 insertions(+), 24 deletions(-) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c index 311e6ca3bdc4..04747573fc48 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -37,9 +37,15 @@ #include <linux/bitmap.h> #include <linux/bitops.h> #include <linux/iopoll.h> +#include <linux/reset.h> #define RCANFD_DRV_NAME "rcar_canfd" +enum rcanfd_chip_id { + RENESAS_RCAR_GEN3 = 0, + RENESAS_RZG2L, +}; + /* Global register bits */ /* RSCFDnCFDGRMCFG */ @@ -513,6 +519,9 @@ struct rcar_canfd_global { enum rcar_canfd_fcanclk fcan; /* CANFD or Ext clock */ unsigned long channels_mask; /* Enabled channels mask */ bool fdmode; /* CAN FD or Classical CAN only mode */ + struct reset_control *rstc1; + struct reset_control *rstc2; + enum rcanfd_chip_id chip_id; }; /* CAN FD mode nominal rate constants */ @@ -1577,6 +1586,53 @@ static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch, priv->can.clock.freq = fcan_freq; dev_info(&pdev->dev, "can_clk rate is %u\n", priv->can.clock.freq); + if (gpriv->chip_id == RENESAS_RZG2L) { + char *irq_name; + int err_irq; + int tx_irq; + + err_irq = platform_get_irq_byname(pdev, ch == 0 ? "ch0_err" : "ch1_err"); + if (err_irq < 0) { + err = err_irq; + goto fail; + } + + tx_irq = platform_get_irq_byname(pdev, ch == 0 ? "ch0_trx" : "ch1_trx"); + if (tx_irq < 0) { + err = tx_irq; + goto fail; + } + + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, + "canfd.ch%d_err", ch); + if (!irq_name) { + err = -ENOMEM; + goto fail; + } + err = devm_request_irq(&pdev->dev, err_irq, + rcar_canfd_channel_interrupt, 0, + irq_name, gpriv); + if (err) { + dev_err(&pdev->dev, "devm_request_irq CH Err(%d) failed, error %d\n", + err_irq, err); + goto fail; + } + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, + "canfd.ch%d_trx", ch); + if (!irq_name) { + err = -ENOMEM; + goto fail; + } + err = devm_request_irq(&pdev->dev, tx_irq, + rcar_canfd_channel_interrupt, 0, + irq_name, gpriv); + if (err) { + dev_err(&pdev->dev, "devm_request_irq Tx (%d) failed, error %d\n", + tx_irq, err); + goto fail; + } + } + if (gpriv->fdmode) { priv->can.bittiming_const = &rcar_canfd_nom_bittiming_const; priv->can.data_bittiming_const = @@ -1636,7 +1692,11 @@ static int rcar_canfd_probe(struct platform_device *pdev) struct device_node *of_child; unsigned long channels_mask = 0; int err, ch_irq, g_irq; + int g_err_irq, g_recc_irq; bool fdmode = true; /* CAN FD only mode - default */ + enum rcanfd_chip_id chip_id; + + chip_id = (enum rcanfd_chip_id)of_device_get_match_data(&pdev->dev); if (of_property_read_bool(pdev->dev.of_node, "renesas,no-can-fd")) fdmode = false; /* Classical CAN only mode */ @@ -1649,16 +1709,30 @@ static int rcar_canfd_probe(struct platform_device *pdev) if (of_child && of_device_is_available(of_child)) channels_mask |= BIT(1); /* Channel 1 */ - ch_irq = platform_get_irq(pdev, 0); - if (ch_irq < 0) { - err = ch_irq; - goto fail_dev; - } + if (chip_id == RENESAS_RCAR_GEN3) { + ch_irq = platform_get_irq_byname_optional(pdev, "ch_int"); + if (ch_irq < 0) { + /* For backward compatibility get irq by index */ + ch_irq = platform_get_irq(pdev, 0); + if (ch_irq < 0) + return ch_irq; + } - g_irq = platform_get_irq(pdev, 1); - if (g_irq < 0) { - err = g_irq; - goto fail_dev; + g_irq = platform_get_irq_byname_optional(pdev, "g_int"); + if (g_irq < 0) { + /* For backward compatibility get irq by index */ + g_irq = platform_get_irq(pdev, 1); + if (g_irq < 0) + return g_irq; + } + } else { + g_err_irq = platform_get_irq_byname(pdev, "g_err"); + if (g_err_irq < 0) + return g_err_irq; + + g_recc_irq = platform_get_irq_byname(pdev, "g_recc"); + if (g_recc_irq < 0) + return g_recc_irq; } /* Global controller context */ @@ -1670,6 +1744,19 @@ static int rcar_canfd_probe(struct platform_device *pdev) gpriv->pdev = pdev; gpriv->channels_mask = channels_mask; gpriv->fdmode = fdmode; + gpriv->chip_id = chip_id; + + if (gpriv->chip_id == RENESAS_RZG2L) { + gpriv->rstc1 = devm_reset_control_get_exclusive(&pdev->dev, "rstp_n"); + if (IS_ERR(gpriv->rstc1)) + return dev_err_probe(&pdev->dev, PTR_ERR(gpriv->rstc1), + "failed to get rstp_n\n"); + + gpriv->rstc2 = devm_reset_control_get_exclusive(&pdev->dev, "rstc_n"); + if (IS_ERR(gpriv->rstc2)) + return dev_err_probe(&pdev->dev, PTR_ERR(gpriv->rstc2), + "failed to get rstc_n\n"); + } /* Peripheral clock */ gpriv->clkp = devm_clk_get(&pdev->dev, "fck"); @@ -1699,7 +1786,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) } fcan_freq = clk_get_rate(gpriv->can_clk); - if (gpriv->fcan == RCANFD_CANFDCLK) + if (gpriv->fcan == RCANFD_CANFDCLK && gpriv->chip_id == RENESAS_RCAR_GEN3) /* CANFD clock is further divided by (1/2) within the IP */ fcan_freq /= 2; @@ -1711,20 +1798,51 @@ static int rcar_canfd_probe(struct platform_device *pdev) gpriv->base = addr; /* Request IRQ that's common for both channels */ - err = devm_request_irq(&pdev->dev, ch_irq, - rcar_canfd_channel_interrupt, 0, - "canfd.chn", gpriv); - if (err) { - dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", - ch_irq, err); - goto fail_dev; + if (gpriv->chip_id == RENESAS_RCAR_GEN3) { + err = devm_request_irq(&pdev->dev, ch_irq, + rcar_canfd_channel_interrupt, 0, + "canfd.ch_int", gpriv); + if (err) { + dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", + ch_irq, err); + goto fail_dev; + } + + err = devm_request_irq(&pdev->dev, g_irq, + rcar_canfd_global_interrupt, 0, + "canfd.g_int", gpriv); + if (err) { + dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", + g_irq, err); + goto fail_dev; + } + } else { + err = devm_request_irq(&pdev->dev, g_recc_irq, + rcar_canfd_global_interrupt, 0, + "canfd.g_recc", gpriv); + + if (err) { + dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", + g_recc_irq, err); + goto fail_dev; + } + + err = devm_request_irq(&pdev->dev, g_err_irq, + rcar_canfd_global_interrupt, 0, + "canfd.g_err", gpriv); + if (err) { + dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", + g_err_irq, err); + goto fail_dev; + } } - err = devm_request_irq(&pdev->dev, g_irq, - rcar_canfd_global_interrupt, 0, - "canfd.gbl", gpriv); + + err = reset_control_reset(gpriv->rstc1); + if (err) + goto fail_dev; + err = reset_control_reset(gpriv->rstc2); if (err) { - dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", - g_irq, err); + reset_control_assert(gpriv->rstc1); goto fail_dev; } @@ -1733,7 +1851,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) if (err) { dev_err(&pdev->dev, "failed to enable peripheral clock, error %d\n", err); - goto fail_dev; + goto fail_reset; } err = rcar_canfd_reset_controller(gpriv); @@ -1790,6 +1908,9 @@ static int rcar_canfd_probe(struct platform_device *pdev) rcar_canfd_disable_global_interrupts(gpriv); fail_clk: clk_disable_unprepare(gpriv->clkp); +fail_reset: + reset_control_assert(gpriv->rstc1); + reset_control_assert(gpriv->rstc2); fail_dev: return err; } @@ -1810,6 +1931,9 @@ static int rcar_canfd_remove(struct platform_device *pdev) /* Enter global sleep mode */ rcar_canfd_set_bit(gpriv->base, RCANFD_GCTR, RCANFD_GCTR_GSLPR); clk_disable_unprepare(gpriv->clkp); + reset_control_assert(gpriv->rstc1); + reset_control_assert(gpriv->rstc2); + return 0; } @@ -1827,7 +1951,8 @@ static SIMPLE_DEV_PM_OPS(rcar_canfd_pm_ops, rcar_canfd_suspend, rcar_canfd_resume); static const struct of_device_id rcar_canfd_of_table[] = { - { .compatible = "renesas,rcar-gen3-canfd" }, + { .compatible = "renesas,rcar-gen3-canfd", .data = (void *)RENESAS_RCAR_GEN3 }, + { .compatible = "renesas,rzg2l-canfd", .data = (void *)RENESAS_RZG2L }, { } }; -- 2.17.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v3 2/3] can: rcar_canfd: Add support for RZ/G2L family 2021-07-21 19:49 ` [PATCH v3 2/3] can: rcar_canfd: Add support for RZ/G2L family Lad Prabhakar @ 2021-07-26 9:53 ` Geert Uytterhoeven 2021-07-26 21:58 ` Lad, Prabhakar 0 siblings, 1 reply; 7+ messages in thread From: Geert Uytterhoeven @ 2021-07-26 9:53 UTC (permalink / raw) To: Lad Prabhakar Cc: Rob Herring, Fabrizio Castro, Wolfgang Grandegger, Marc Kleine-Budde, David S. Miller, Jakub Kicinski, Philipp Zabel, linux-can, netdev, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, Linux Kernel Mailing List, Linux-Renesas, Prabhakar, Biju Das Hi Prabhakar, On Wed, Jul 21, 2021 at 9:50 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > CANFD block on RZ/G2L SoC is almost identical to one found on > R-Car Gen3 SoC's. On RZ/G2L SoC interrupt sources for each channel > are split into different sources and the IP doesn't divide (1/2) > CANFD clock within the IP. > > This patch adds compatible string for RZ/G2L family and registers > the irq handlers required for CANFD operation. IRQ numbers are now > fetched based on names instead of indices. For backward compatibility > on non RZ/G2L SoC's we fallback reading based on indices. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Thanks for the update! I think you misunderstood my comment on v1 about the interrupt handlers, cfr. below. > --- a/drivers/net/can/rcar/rcar_canfd.c > +++ b/drivers/net/can/rcar/rcar_canfd.c > @@ -1577,6 +1586,53 @@ static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch, > priv->can.clock.freq = fcan_freq; > dev_info(&pdev->dev, "can_clk rate is %u\n", priv->can.clock.freq); > > + if (gpriv->chip_id == RENESAS_RZG2L) { > + char *irq_name; > + int err_irq; > + int tx_irq; > + > + err_irq = platform_get_irq_byname(pdev, ch == 0 ? "ch0_err" : "ch1_err"); > + if (err_irq < 0) { > + err = err_irq; > + goto fail; > + } > + > + tx_irq = platform_get_irq_byname(pdev, ch == 0 ? "ch0_trx" : "ch1_trx"); > + if (tx_irq < 0) { > + err = tx_irq; > + goto fail; > + } > + > + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, > + "canfd.ch%d_err", ch); > + if (!irq_name) { > + err = -ENOMEM; > + goto fail; > + } > + err = devm_request_irq(&pdev->dev, err_irq, > + rcar_canfd_channel_interrupt, 0, This is the same interrupt handler... > + irq_name, gpriv); > + if (err) { > + dev_err(&pdev->dev, "devm_request_irq CH Err(%d) failed, error %d\n", > + err_irq, err); > + goto fail; > + } > + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, > + "canfd.ch%d_trx", ch); > + if (!irq_name) { > + err = -ENOMEM; > + goto fail; > + } > + err = devm_request_irq(&pdev->dev, tx_irq, > + rcar_canfd_channel_interrupt, 0, ... as this one. > + irq_name, gpriv); > + if (err) { > + dev_err(&pdev->dev, "devm_request_irq Tx (%d) failed, error %d\n", > + tx_irq, err); > + goto fail; > + } > + } > + > if (gpriv->fdmode) { > priv->can.bittiming_const = &rcar_canfd_nom_bittiming_const; > priv->can.data_bittiming_const = > @@ -1711,20 +1798,51 @@ static int rcar_canfd_probe(struct platform_device *pdev) > gpriv->base = addr; > > /* Request IRQ that's common for both channels */ > - err = devm_request_irq(&pdev->dev, ch_irq, > - rcar_canfd_channel_interrupt, 0, > - "canfd.chn", gpriv); > - if (err) { > - dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", > - ch_irq, err); > - goto fail_dev; > + if (gpriv->chip_id == RENESAS_RCAR_GEN3) { > + err = devm_request_irq(&pdev->dev, ch_irq, > + rcar_canfd_channel_interrupt, 0, > + "canfd.ch_int", gpriv); > + if (err) { > + dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", > + ch_irq, err); > + goto fail_dev; > + } > + > + err = devm_request_irq(&pdev->dev, g_irq, > + rcar_canfd_global_interrupt, 0, > + "canfd.g_int", gpriv); > + if (err) { > + dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", > + g_irq, err); > + goto fail_dev; > + } > + } else { > + err = devm_request_irq(&pdev->dev, g_recc_irq, > + rcar_canfd_global_interrupt, 0, This is the same interrupt handler... > + "canfd.g_recc", gpriv); > + > + if (err) { > + dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", > + g_recc_irq, err); > + goto fail_dev; > + } > + > + err = devm_request_irq(&pdev->dev, g_err_irq, > + rcar_canfd_global_interrupt, 0, ... as this one. > + "canfd.g_err", gpriv); > + if (err) { > + dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", > + g_err_irq, err); > + goto fail_dev; > + } > } > - err = devm_request_irq(&pdev->dev, g_irq, > - rcar_canfd_global_interrupt, 0, > - "canfd.gbl", gpriv); > + > + err = reset_control_reset(gpriv->rstc1); > + if (err) > + goto fail_dev; > + err = reset_control_reset(gpriv->rstc2); > if (err) { > - dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", > - g_irq, err); > + reset_control_assert(gpriv->rstc1); > goto fail_dev; > } I did not object to having fine-grained interrupt handlers on RZ/G2L. I did object to duplicating code in global and fine-grained interrupt handlers. The trick to have both is to let the global interrupt handlers call (conditionally) into the fine-grained handlers. In pseudo-code: global_interrupt_handler() { if (...) fine_grained_handler1(); if (...) fine_grained_handler2(); ... } On R-Car Gen3, you register the global interrupt handlers, as before. On RZ/G2L, you register the fine-grained interrupt handlers instead. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 2/3] can: rcar_canfd: Add support for RZ/G2L family 2021-07-26 9:53 ` Geert Uytterhoeven @ 2021-07-26 21:58 ` Lad, Prabhakar 0 siblings, 0 replies; 7+ messages in thread From: Lad, Prabhakar @ 2021-07-26 21:58 UTC (permalink / raw) To: Geert Uytterhoeven Cc: Lad Prabhakar, Rob Herring, Fabrizio Castro, Wolfgang Grandegger, Marc Kleine-Budde, David S. Miller, Jakub Kicinski, Philipp Zabel, linux-can, netdev, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, Linux Kernel Mailing List, Linux-Renesas, Biju Das Hi Geert, Thank you for the review. On Mon, Jul 26, 2021 at 10:53 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Prabhakar, > > On Wed, Jul 21, 2021 at 9:50 PM Lad Prabhakar > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > > CANFD block on RZ/G2L SoC is almost identical to one found on > > R-Car Gen3 SoC's. On RZ/G2L SoC interrupt sources for each channel > > are split into different sources and the IP doesn't divide (1/2) > > CANFD clock within the IP. > > > > This patch adds compatible string for RZ/G2L family and registers > > the irq handlers required for CANFD operation. IRQ numbers are now > > fetched based on names instead of indices. For backward compatibility > > on non RZ/G2L SoC's we fallback reading based on indices. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Thanks for the update! > > I think you misunderstood my comment on v1 about the interrupt > handlers, cfr. below. > Argh my bad I took it the other way round! > > --- a/drivers/net/can/rcar/rcar_canfd.c > > +++ b/drivers/net/can/rcar/rcar_canfd.c > > > @@ -1577,6 +1586,53 @@ static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch, > > priv->can.clock.freq = fcan_freq; > > dev_info(&pdev->dev, "can_clk rate is %u\n", priv->can.clock.freq); > > > > + if (gpriv->chip_id == RENESAS_RZG2L) { > > + char *irq_name; > > + int err_irq; > > + int tx_irq; > > + > > + err_irq = platform_get_irq_byname(pdev, ch == 0 ? "ch0_err" : "ch1_err"); > > + if (err_irq < 0) { > > + err = err_irq; > > + goto fail; > > + } > > + > > + tx_irq = platform_get_irq_byname(pdev, ch == 0 ? "ch0_trx" : "ch1_trx"); > > + if (tx_irq < 0) { > > + err = tx_irq; > > + goto fail; > > + } > > + > > + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, > > + "canfd.ch%d_err", ch); > > + if (!irq_name) { > > + err = -ENOMEM; > > + goto fail; > > + } > > + err = devm_request_irq(&pdev->dev, err_irq, > > + rcar_canfd_channel_interrupt, 0, > > This is the same interrupt handler... > > > + irq_name, gpriv); > > + if (err) { > > + dev_err(&pdev->dev, "devm_request_irq CH Err(%d) failed, error %d\n", > > + err_irq, err); > > + goto fail; > > + } > > + irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, > > + "canfd.ch%d_trx", ch); > > + if (!irq_name) { > > + err = -ENOMEM; > > + goto fail; > > + } > > + err = devm_request_irq(&pdev->dev, tx_irq, > > + rcar_canfd_channel_interrupt, 0, > > ... as this one. > > > + irq_name, gpriv); > > + if (err) { > > + dev_err(&pdev->dev, "devm_request_irq Tx (%d) failed, error %d\n", > > + tx_irq, err); > > + goto fail; > > + } > > + } > > + > > if (gpriv->fdmode) { > > priv->can.bittiming_const = &rcar_canfd_nom_bittiming_const; > > priv->can.data_bittiming_const = > > > @@ -1711,20 +1798,51 @@ static int rcar_canfd_probe(struct platform_device *pdev) > > gpriv->base = addr; > > > > /* Request IRQ that's common for both channels */ > > - err = devm_request_irq(&pdev->dev, ch_irq, > > - rcar_canfd_channel_interrupt, 0, > > - "canfd.chn", gpriv); > > - if (err) { > > - dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", > > - ch_irq, err); > > - goto fail_dev; > > + if (gpriv->chip_id == RENESAS_RCAR_GEN3) { > > + err = devm_request_irq(&pdev->dev, ch_irq, > > + rcar_canfd_channel_interrupt, 0, > > + "canfd.ch_int", gpriv); > > + if (err) { > > + dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", > > + ch_irq, err); > > + goto fail_dev; > > + } > > + > > + err = devm_request_irq(&pdev->dev, g_irq, > > + rcar_canfd_global_interrupt, 0, > > + "canfd.g_int", gpriv); > > + if (err) { > > + dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", > > + g_irq, err); > > + goto fail_dev; > > + } > > + } else { > > + err = devm_request_irq(&pdev->dev, g_recc_irq, > > + rcar_canfd_global_interrupt, 0, > > This is the same interrupt handler... > > > + "canfd.g_recc", gpriv); > > + > > + if (err) { > > + dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", > > + g_recc_irq, err); > > + goto fail_dev; > > + } > > + > > + err = devm_request_irq(&pdev->dev, g_err_irq, > > + rcar_canfd_global_interrupt, 0, > > ... as this one. > > > + "canfd.g_err", gpriv); > > + if (err) { > > + dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", > > + g_err_irq, err); > > + goto fail_dev; > > + } > > } > > - err = devm_request_irq(&pdev->dev, g_irq, > > - rcar_canfd_global_interrupt, 0, > > - "canfd.gbl", gpriv); > > + > > + err = reset_control_reset(gpriv->rstc1); > > + if (err) > > + goto fail_dev; > > + err = reset_control_reset(gpriv->rstc2); > > if (err) { > > - dev_err(&pdev->dev, "devm_request_irq(%d) failed, error %d\n", > > - g_irq, err); > > + reset_control_assert(gpriv->rstc1); > > goto fail_dev; > > } > > I did not object to having fine-grained interrupt handlers on RZ/G2L. > I did object to duplicating code in global and fine-grained interrupt > handlers. > > The trick to have both is to let the global interrupt handlers call > (conditionally) into the fine-grained handlers. In pseudo-code: > > global_interrupt_handler() > { > if (...) > fine_grained_handler1(); > > if (...) > fine_grained_handler2(); > ... > } > > On R-Car Gen3, you register the global interrupt handlers, as before. > On RZ/G2L, you register the fine-grained interrupt handlers instead. > Agreed will re-spin with the fine-grained version tomorrow. Cheers, Prabhakar > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 3/3] arm64: dts: renesas: r9a07g044: Add CANFD node 2021-07-21 19:49 [PATCH v3 0/3] Renesas RZ/G2L CANFD support Lad Prabhakar 2021-07-21 19:49 ` [PATCH v3 1/3] dt-bindings: net: can: renesas,rcar-canfd: Document RZ/G2L SoC Lad Prabhakar 2021-07-21 19:49 ` [PATCH v3 2/3] can: rcar_canfd: Add support for RZ/G2L family Lad Prabhakar @ 2021-07-21 19:49 ` Lad Prabhakar 2 siblings, 0 replies; 7+ messages in thread From: Lad Prabhakar @ 2021-07-21 19:49 UTC (permalink / raw) To: Geert Uytterhoeven, Rob Herring, Fabrizio Castro, Wolfgang Grandegger, Marc Kleine-Budde, David S. Miller, Jakub Kicinski, Philipp Zabel, linux-can, netdev, devicetree Cc: linux-kernel, linux-renesas-soc, Prabhakar, Biju Das, Lad Prabhakar Add CANFD node to R9A07G044 (RZ/G2L) SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index 9a7489dc70d1..51655c09f1f8 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -13,6 +13,13 @@ #address-cells = <2>; #size-cells = <2>; + /* External CAN clock - to be overridden by boards that provide it */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + /* clock can be either from exclk or crystal oscillator (XIN/XOUT) */ extal_clk: extal { compatible = "fixed-clock"; @@ -89,6 +96,40 @@ status = "disabled"; }; + canfd: can@10050000 { + compatible = "renesas,r9a07g044-canfd", "renesas,rzg2l-canfd"; + reg = <0 0x10050000 0 0x8000>; + interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "g_err", "g_recc", + "ch0_err", "ch0_rec", "ch0_trx", + "ch1_err", "ch1_rec", "ch1_trx"; + clocks = <&cpg CPG_MOD R9A07G044_CANFD_PCLK>, + <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>, + <&can_clk>; + clock-names = "fck", "canfd", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>; + assigned-clock-rates = <50000000>; + resets = <&cpg R9A07G044_CANFD_RSTP_N>, + <&cpg R9A07G044_CANFD_RSTC_N>; + reset-names = "rstp_n", "rstc_n"; + power-domains = <&cpg>; + status = "disabled"; + + channel0 { + status = "disabled"; + }; + channel1 { + status = "disabled"; + }; + }; + i2c0: i2c@10058000 { #address-cells = <1>; #size-cells = <0>; -- 2.17.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-07-26 22:46 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-07-21 19:49 [PATCH v3 0/3] Renesas RZ/G2L CANFD support Lad Prabhakar 2021-07-21 19:49 ` [PATCH v3 1/3] dt-bindings: net: can: renesas,rcar-canfd: Document RZ/G2L SoC Lad Prabhakar 2021-07-26 22:46 ` Rob Herring 2021-07-21 19:49 ` [PATCH v3 2/3] can: rcar_canfd: Add support for RZ/G2L family Lad Prabhakar 2021-07-26 9:53 ` Geert Uytterhoeven 2021-07-26 21:58 ` Lad, Prabhakar 2021-07-21 19:49 ` [PATCH v3 3/3] arm64: dts: renesas: r9a07g044: Add CANFD node Lad Prabhakar
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