From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2228C54EE9 for ; Wed, 28 Sep 2022 12:32:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233937AbiI1Mcw (ORCPT ); Wed, 28 Sep 2022 08:32:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49732 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233930AbiI1Mcv (ORCPT ); Wed, 28 Sep 2022 08:32:51 -0400 Received: from baptiste.telenet-ops.be (baptiste.telenet-ops.be [IPv6:2a02:1800:120:4::f00:13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9180B95AD5 for ; Wed, 28 Sep 2022 05:32:48 -0700 (PDT) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed50:5556:1b6:16f5:2874]) by baptiste.telenet-ops.be with bizsmtp id RQYl2800Q40fT9J01QYlGo; Wed, 28 Sep 2022 14:32:45 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1odWF3-0006ji-3n; Wed, 28 Sep 2022 14:32:45 +0200 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1odWF2-0031ce-Lo; Wed, 28 Sep 2022 14:32:44 +0200 From: Geert Uytterhoeven To: Michael Turquette , Stephen Boyd Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH] clk: renesas: r8a779g0: Add INTC-EX clock Date: Wed, 28 Sep 2022 14:32:43 +0200 Message-Id: <8b5ab900ebce8c38604292a5138da11ad2cb072c.1664368268.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add the module clock used by the Interrupt Controller for External Devices (INTC-EX) aka IRQC on the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Geert Uytterhoeven --- This depends on "clk: renesas: r8a779g0: Add MSIOF clocks". To be queued in renesas-clk-for-v6.2. drivers/clk/renesas/r8a779g0-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c index ae5e04eb93585d18..ad096719fd36b55b 100644 --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -163,6 +163,7 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { DEF_MOD("i2c3", 521, R8A779G0_CLK_S0D6_PER), DEF_MOD("i2c4", 522, R8A779G0_CLK_S0D6_PER), DEF_MOD("i2c5", 523, R8A779G0_CLK_S0D6_PER), + DEF_MOD("irqc", 611, R8A779G0_CLK_CL16M), DEF_MOD("msi0", 618, R8A779G0_CLK_MSO), DEF_MOD("msi1", 619, R8A779G0_CLK_MSO), DEF_MOD("msi2", 620, R8A779G0_CLK_MSO), -- 2.25.1