linux-renesas-soc.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: geert+renesas@glider.be, linus.walleij@linaro.org,
	linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
	Takeshi Kihara <takeshi.kihara.df@renesas.com>
Subject: Re: [PATCH 2/2] pinctrl: sh-pfc: r8a77995: Fix MOD_SEL bit numbering
Date: Thu, 13 Dec 2018 15:52:43 +0200	[thread overview]
Message-ID: <9308781.U9oT2vPqyz@avalon> (raw)
In-Reply-To: <1544609975-26477-3-git-send-email-yoshihiro.shimoda.uh@renesas.com>

Hello Shimoda-san,

Thank you for the patch.

On Wednesday, 12 December 2018 12:19:35 EET Yoshihiro Shimoda wrote:
> From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> 
> MOD_SEL register bit numbering was different from R-Car D3 SoC and
> R-Car H3/M3-[WN] SoCs.
> 
> MOD_SEL 1-bit      H3/M3-[WN]  D3
> ===============    ==========  =====
> Set Value = H'0    b'0         b'0
> Set Value = H'1    b'1         b'1
> 
> MOD_SEL 2-bits     H3/M3-[WN]  D3
> ===============    ==========  =====
> Set Value = H'0    b'00        b'00
> Set Value = H'1    b'01        b'10
> Set Value = H'2    b'10        b'01
> Set Value = H'3    b'11        b'11
> 
> MOD_SEL 3-bits     H3/M3-[WN]  D3
> ===============    ==========  =====
> Set Value = H'0    b'000       b'000
> Set Value = H'1    b'001       b'100
> Set Value = H'2    b'010       b'010
> Set Value = H'3    b'011       b'110
> Set Value = H'4    b'100       b'001
> Set Value = H'5    b'101       b'101
> Set Value = H'6    b'110       b'011
> Set Value = H'7    b'111       b'111
> 
> This patch replaces the #define name and value of MOD_SEL.
> 
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Fixes: 794a67117646 ("pinctrl: sh-pfc: Initial R8A77995 PFC support")
> [shimoda: split a patch per SoC and revise the commit log]
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Per Geert's request I've tested this patch on the Draak board with pwm-
backlight, and it doesn't seem to make any difference.

> ---
>  drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c index e457539..e0db6f3 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c
> @@ -388,10 +388,10 @@
>  #define MOD_SEL0_27		FM(SEL_MSIOF3_0)	FM(SEL_MSIOF3_1)
>  #define MOD_SEL0_26		FM(SEL_HSCIF3_0)	FM(SEL_HSCIF3_1)
>  #define MOD_SEL0_25		FM(SEL_SCIF4_0)		FM(SEL_SCIF4_1)
> -#define
> MOD_SEL0_24_23		FM(SEL_PWM0_0)		FM(SEL_PWM0_1)		FM(SEL_PWM0_2)		
FM(SEL_PWM0
> _3) -#define
> MOD_SEL0_22_21		FM(SEL_PWM1_0)		FM(SEL_PWM1_1)		FM(SEL_PWM1_2)		
FM(SEL_PWM1
> _3) -#define
> MOD_SEL0_20_19		FM(SEL_PWM2_0)		FM(SEL_PWM2_1)		FM(SEL_PWM2_2)		
FM(SEL_PWM2
> _3) -#define
> MOD_SEL0_18_17		FM(SEL_PWM3_0)		FM(SEL_PWM3_1)		FM(SEL_PWM3_2)		
FM(SEL_PWM3
> _3) +#define
> MOD_SEL0_24_23		FM(SEL_PWM0_0)		FM(SEL_PWM0_2)		FM(SEL_PWM0_1)		
FM(SEL_PWM0
> _3) +#define
> MOD_SEL0_22_21		FM(SEL_PWM1_0)		FM(SEL_PWM1_2)		FM(SEL_PWM1_1)		
FM(SEL_PWM1
> _3) +#define
> MOD_SEL0_20_19		FM(SEL_PWM2_0)		FM(SEL_PWM2_2)		FM(SEL_PWM2_1)		
FM(SEL_PWM2
> _3) +#define
> MOD_SEL0_18_17		FM(SEL_PWM3_0)		FM(SEL_PWM3_2)		FM(SEL_PWM3_1)		
FM(SEL_PWM3
> _3) #define MOD_SEL0_15		FM(SEL_IRQ_0_0)		FM(SEL_IRQ_0_1)
>  #define MOD_SEL0_14		FM(SEL_IRQ_1_0)		FM(SEL_IRQ_1_1)
>  #define MOD_SEL0_13		FM(SEL_IRQ_2_0)		FM(SEL_IRQ_2_1)

-- 
Regards,

Laurent Pinchart




  reply	other threads:[~2018-12-13 13:52 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-12 10:19 [PATCH 0/2] pinctrl: sh-pfc: r8a7799[05]: Fix MOD_SEL bit numbering Yoshihiro Shimoda
2018-12-12 10:19 ` [PATCH 1/2] pinctrl: sh-pfc: r8a77990: " Yoshihiro Shimoda
2018-12-20 14:05   ` Geert Uytterhoeven
2018-12-12 10:19 ` [PATCH 2/2] pinctrl: sh-pfc: r8a77995: " Yoshihiro Shimoda
2018-12-13 13:52   ` Laurent Pinchart [this message]
2018-12-14 10:41     ` Yoshihiro Shimoda
2018-12-14 12:51       ` Laurent Pinchart

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=9308781.U9oT2vPqyz@avalon \
    --to=laurent.pinchart@ideasonboard.com \
    --cc=geert+renesas@glider.be \
    --cc=linus.walleij@linaro.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=takeshi.kihara.df@renesas.com \
    --cc=yoshihiro.shimoda.uh@renesas.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).