Re: [PATCH v2 2/4] media: dt-bindings: Document Renesas RZ/G2L CRU block

From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: "Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"Mauro Carvalho Chehab" <mchehab@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Jacopo Mondi" <jacopo@jmondi.org>,
	"Niklas Söderlund" <niklas.soderlund@ragnatech.se>,
	"Sakari Ailus" <sakari.ailus@linux.intel.com>,
	"Hans Verkuil" <hverkuil-cisco@xs4all.nl>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	linux-media@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	"Biju Das" <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH v2 2/4] media: dt-bindings: Document Renesas RZ/G2L CRU block
Date: Fri, 30 Sep 2022 11:49:22 +0100	[thread overview]
Message-ID: <CA+V-a8vaHPbXQWyMeVWsFaf3mUSAECcJiiww5xmhC99+zm3SuQ@mail.gmail.com> (raw)
In-Reply-To: <YyxnJ/Ho5rZQzDDN@pendragon.ideasonboard.com>

Hi Laurent and Krzysztof,

On Thu, Sep 22, 2022 at 2:46 PM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> On Wed, Sep 21, 2022 at 08:58:26PM +0200, Krzysztof Kozlowski wrote:
> > On 21/09/2022 19:29, Laurent Pinchart wrote:
> > >>>>> +  clock-names:
> > >>>>> +    items:
> > >>>>> +      - const: vclk
> > >>>>> +      - const: pclk
> > >>>>> +      - const: aclk
> > >>>>
> > >>>> Drop the "clk" suffixes. Remaining names could be made a bit more readable.
> > >>>
> > >>> These names come from the documentation, isn't it better to match the
> > >>> datasheet ?
> > >>
> > >> If datasheet calls it "vclk_really_clk_it_is_clk_clk", it's not the
> > >> reason to use it. :)
> > >>
> > >> The "clk" is redundant even if the hardware engineer thought different.
> > >>
> > >> The same for IRQs ("tx" not "txirq"), for dmas ("tx" not "txdma").
> > >
> > > I'd argue that naming clocks "v", "p" and "a" would be less readable and
> > > more confusing. Is this a new rule ?
> >
> > Not really, but also it's only a style issue.
> >
> > Indeed "v" and "p" are not much better... but still "vclk" does not
> > bring any additional information over "v". It's redundant.
> >
> > You can also drop entire entry - unless it helps in particular
> > implementation.
>
> There are multiple clocks, so I think names are better than indices. If
> you really insist we could name them "v", "p" and "a", but I think the
> clk suffix here improves readability. If those clocks were named
> "videoclk", "pixelclk" and "axiclk" I'd be fine dropping the suffix, but
> that's not the case here.
>
I have got the below details from the HW  team:

CRU_SYSCLK -> System clock for CSI-2 DPHY
CRU_VCLK -> video clock
CRU_PCLK -> APB clock
CRU_ACLK -> AXI clock

So I'll rename the clocks to below respectively:

+  clock-names:
+    items:
+      - const: system
+      - const: video
+      - const: apb
+      - const: axi

Does the above sound good?

Cheers,
Prabhakar