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From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Rob Herring <robh@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Marek Vasut <marek.vasut+renesas@gmail.com>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	PCI <linux-pci@vger.kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Andrew Murray <andrew.murray@arm.com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
	<linux-arm-kernel@lists.infradead.org>,
	"open list:MEDIA DRIVERS FOR RENESAS - FCP" 
	<linux-renesas-soc@vger.kernel.org>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Frank Rowand <frowand.list@gmail.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Simon Horman <horms@verge.net.au>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	Tom Joseph <tjoseph@cadence.com>,
	Heiko Stuebner <heiko@sntech.de>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	"Lad, Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [v2 3/6] of: address: add support to parse PCI outbound-ranges
Date: Thu, 2 Jan 2020 08:44:23 +0000	[thread overview]
Message-ID: <CA+V-a8vjwqkH5rYsy_rsHF93d91izsaEwmFXNpYqk3_=_Asd2g@mail.gmail.com> (raw)
In-Reply-To: <20191219233129.GA5484@bogus>

Hi Rob,

On Thu, Dec 19, 2019 at 11:31 PM Rob Herring <robh@kernel.org> wrote:
>
> On Mon, Dec 16, 2019 at 08:49:23AM +0000, Lad, Prabhakar wrote:
> > Hi Rob,
> >
> > Thank you for the review.
> >
> > On Fri, Dec 13, 2019 at 8:37 PM Rob Herring <robh+dt@kernel.org> wrote:
> > >
> > > On Fri, Dec 13, 2019 at 2:48 AM Lad Prabhakar
> > > <prabhakar.csengg@gmail.com> wrote:
> > > >
> > > > From: "Lad, Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > >
> > > > this patch adds support to parse PCI outbound-ranges, the
> > > > outbound-regions are similar to pci ranges except it doesn't
> > > > have pci address, below is the format for bar-ranges:
> > > >
> > > > outbound-ranges = <flags upper32_cpuaddr lower32_cpuaddr
> > > >                    upper32_size lower32_size>;
> > >
> > > You can't just make up a new ranges property. Especially one that
> > > doesn't follow how 'ranges' works. We already have 'dma-ranges' to
> > > translate device to memory addresses.
> > >
> > > Explain the problem or feature you need, not the solution you came up
> > > with. Why do you need this and other endpoint bindings haven't?
> > >
> > rcar SoC's supports multiple outbound region for mapping the PCI address
> > locally to the system. This lead to discussion where there exist controllers
> > which support regions for high/low priority transfer and similarly regions
> > for large/small memory allocations, as a result a new ranges property was
> > added, where we can specify the flags which would indicate how the outbound
> > region can be used during requests.
>
> What are the flags?

below are the flags which were discussed in first version of the
series, but since the driver is
currently using just PCI_EPC_WINDOW_FLAG_NON_MULTI_ALLOC flag I'll be
dropping them in
next version (suggested by Kishon) and rest will be added as and when
required by the driver.

 * @PCI_EPC_WINDOW_FLAG_MULTI_ALLOC: Indicates multiple chunks of memory can be
 *                                  allocated from same window
 * @PCI_EPC_WINDOW_FLAG_NON_MULTI_ALLOC: Indicates only single memory allocation
 *                                      is possible on the window
 * @PCI_EPC_WINDOW_FLAG_LARGE_ALLOC: Window is used for large memory allocation
 * @PCI_EPC_WINDOW_FLAG_SMALL_ALLOC: Window is used for small memory allocation
 * @PCI_EPC_WINDOW_FLAG_HIGH_PRI_ALLOC: Window is used for high priority data
 *                                     transfers
 * @PCI_EPC_WINDOW_FLAG_LOW_PRI_ALLOC: Window is used for low priority data
 *                                    transfers

Cheers,
--Prabhakar

  reply	other threads:[~2020-01-02  8:44 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-13  8:47 [v2 0/6] Add support for PCIe controller to work in endpoint mode on R-Car SoCs Lad Prabhakar
2019-12-13  8:47 ` [v2 1/6] pci: pcie-rcar: preparation for adding endpoint support Lad Prabhakar
2019-12-13 21:06   ` Bjorn Helgaas
2019-12-16  7:52     ` Lad, Prabhakar
2019-12-13  8:47 ` [v2 2/6] pci: endpoint: add support to handle features of outbound memory Lad Prabhakar
2019-12-13 21:06   ` Bjorn Helgaas
2019-12-16  8:21     ` Lad, Prabhakar
2019-12-16 11:35   ` Kishon Vijay Abraham I
2019-12-18 17:23     ` Lad, Prabhakar
2020-01-02  9:44       ` Kishon Vijay Abraham I
2020-01-02  9:59         ` Lad, Prabhakar
2019-12-13  8:47 ` [v2 3/6] of: address: add support to parse PCI outbound-ranges Lad Prabhakar
2019-12-13 15:07   ` Rob Herring
2019-12-16  8:49     ` Lad, Prabhakar
2019-12-19 23:31       ` Rob Herring
2020-01-02  8:44         ` Lad, Prabhakar [this message]
2020-01-02 22:55           ` Rob Herring
2019-12-13 21:05   ` Bjorn Helgaas
2019-12-16  8:55     ` Lad, Prabhakar
2019-12-13  8:47 ` [v2 4/6] dt-bindings: PCI: rcar: Add bindings for R-Car PCIe endpoint controller Lad Prabhakar
2019-12-19 23:35   ` Rob Herring
2020-01-02  8:47     ` Lad, Prabhakar
2020-01-03 16:29   ` Lad, Prabhakar
2019-12-13  8:47 ` [v2 5/6] pci: rcar: add support for rcar pcie controller in endpoint mode Lad Prabhakar
2019-12-13  8:47 ` [v2 6/6] misc: pci_endpoint_test: add device-id for RZ/G2E pcie controller Lad Prabhakar
2019-12-13 21:06 ` [v2 0/6] Add support for PCIe controller to work in endpoint mode on R-Car SoCs Bjorn Helgaas
2019-12-16  9:27   ` Lad, Prabhakar

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