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Sun, 20 Oct 2019 14:40:09 -0700 (PDT) MIME-Version: 1.0 References: <20191016200647.32050-1-robh@kernel.org> <20191016200647.32050-6-robh@kernel.org> <20191018123537.GG47056@e119886-lin.cambridge.arm.com> In-Reply-To: <20191018123537.GG47056@e119886-lin.cambridge.arm.com> From: Rob Herring Date: Sun, 20 Oct 2019 16:39:58 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 05/25] PCI: dwc: Use pci_parse_request_of_pci_ranges() To: Andrew Murray Cc: Bjorn Helgaas , Lorenzo Pieralisi , PCI , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE" , Gustavo Pimentel , Heiko Stuebner , Hou Zhiqiang , Jingoo Han , Karthikeyan Mitran , Ley Foon Tan , Linus Walleij , "moderated list:ARM/Mediatek SoC support" , "open list:MEDIA DRIVERS FOR RENESAS - FCP" , "open list:ARM/Rockchip SoC..." , Matthias Brugger , Michal Simek , Ray Jui , rfi@lists.rocketboards.org, Ryder Lee , Scott Branden , Shawn Lin , Simon Horman , Srinath Mannam , Thomas Petazzoni , Toan Le , Tom Joseph , Will Deacon Content-Type: text/plain; charset="UTF-8" Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org On Fri, Oct 18, 2019 at 7:35 AM Andrew Murray wrote: > > On Wed, Oct 16, 2019 at 03:06:27PM -0500, Rob Herring wrote: > > Convert the Designware host bridge to use the common > > pci_parse_request_of_pci_ranges(). > > > > Cc: Jingoo Han > > Cc: Gustavo Pimentel > > Cc: Lorenzo Pieralisi > > Cc: Andrew Murray > > Cc: Bjorn Helgaas > > Signed-off-by: Rob Herring > > --- > > v2: > > - New patch > > > > .../pci/controller/dwc/pcie-designware-host.c | 28 ++++++------------- > > 1 file changed, 8 insertions(+), 20 deletions(-) > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > > index 0f36a926059a..aeec8b65eb97 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > > @@ -319,7 +319,7 @@ int dw_pcie_host_init(struct pcie_port *pp) > > struct device *dev = pci->dev; > > struct device_node *np = dev->of_node; > > struct platform_device *pdev = to_platform_device(dev); > > - struct resource_entry *win, *tmp; > > + struct resource_entry *win; > > struct pci_bus *child; > > struct pci_host_bridge *bridge; > > struct resource *cfg_res; > > @@ -342,31 +342,19 @@ int dw_pcie_host_init(struct pcie_port *pp) > > if (!bridge) > > return -ENOMEM; > > > > - ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, > > - &bridge->windows, &pp->io_base); [...] > > + pp->io_bus_addr = pp->io->start - win->offset; > > + pp->io_base = pci_pio_to_address(pp->io->start); > > Where did io_base come from? This wasn't here before, so why are we setting it > now? It was set in the removed devm_of_pci_get_host_bridge_resources(). Rob