[PATCH v3 0/3] clk: renesas: cpg-mssr: add never-disable option

[PATCH v3 0/3] clk: renesas: cpg-mssr: add never-disable option

[Ulrich Hecht]

Hi!

This revision should work more reliably as it keeps the never-disable
handling in the clock driver instead of relying on the semantics of
CLK_IGNORE_UNUSED, which still allows clocks to be turned off for power
management.

This series adds the option for declaring clocks as "never-disable", i.e. 
clocks that will not be turned on if not used, but also not turned off if
unused. It also enables this option for the RWDT clocks in (almost) all
SoCs.

The point of this is to allow a WDT that has been enabled by the bootloader
to survive these events:

- deferred probing of the WDT device, which can lead the clock driver
  to disable the WDT clock until the WDT is re-probed, giving it a
  blind spot
- probe failure in the WDT driver

There are a number of Gen2 and RZ/G1 SoCs that have the RWDT clock declared
as critical in order to allow SMP bringup code to work. These have been
left as they are.

CU
Uli


Changes since v2:
- use the term "never-disable" instead of "ignore-unused"
- do the handling internally instead of relying on the behavior of
  CLK_IGNORE_UNUSED

Changes since v1:
- rename data structures for clarity
- squash SoC-specific patches into one per family


Ulrich Hecht (3):
  clk: renesas: cpg-mssr: add support for never-disable clocks
  clk: renesas: rcar-gen3: mark RWDT clocks as never-disable
  clk: renesas: rzg2: mark RWDT clock as never-disable

 drivers/clk/renesas/r8a774a1-cpg-mssr.c |  5 +++++
 drivers/clk/renesas/r8a774b1-cpg-mssr.c |  5 +++++
 drivers/clk/renesas/r8a774c0-cpg-mssr.c |  5 +++++
 drivers/clk/renesas/r8a7795-cpg-mssr.c  |  6 +++++-
 drivers/clk/renesas/r8a7796-cpg-mssr.c  |  6 +++++-
 drivers/clk/renesas/r8a77965-cpg-mssr.c |  5 +++++
 drivers/clk/renesas/r8a77970-cpg-mssr.c |  6 +++++-
 drivers/clk/renesas/r8a77980-cpg-mssr.c |  6 +++++-
 drivers/clk/renesas/r8a77990-cpg-mssr.c |  5 +++++
 drivers/clk/renesas/r8a77995-cpg-mssr.c |  6 +++++-
 drivers/clk/renesas/renesas-cpg-mssr.c  | 10 ++++++++++
 drivers/clk/renesas/renesas-cpg-mssr.h  |  9 +++++++++
 12 files changed, 69 insertions(+), 5 deletions(-)

-- 
2.7.4

[PATCH v3 1/3] clk: renesas: cpg-mssr: add support for never-disable clocks

[Ulrich Hecht]

This adds facilities to mark clocks as never to be turned off. The primary
application is the RWDT clock, which needs to remain on throughout the boot
process if enabled by the bootloader.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
---
 drivers/clk/renesas/renesas-cpg-mssr.c | 10 ++++++++++
 drivers/clk/renesas/renesas-cpg-mssr.h |  9 +++++++++
 2 files changed, 19 insertions(+)

diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index 8f6dff3..e234156 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -152,11 +152,13 @@ static struct cpg_mssr_priv *cpg_mssr_priv;
  * @hw: handle between common and hardware-specific interfaces
  * @index: MSTP clock number
  * @priv: CPG/MSSR private data
+ * @never_disable: clock shall never be disabled
  */
 struct mstp_clock {
 	struct clk_hw hw;
 	u32 index;
 	struct cpg_mssr_priv *priv;
+	bool never_disable;
 };
 
 #define to_mstp_clock(_hw) container_of(_hw, struct mstp_clock, hw)
@@ -175,6 +177,9 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
 
 	dev_dbg(dev, "MSTP %u%02u/%pC %s\n", reg, bit, hw->clk,
 		enable ? "ON" : "OFF");
+	if (!enable && clock->never_disable)
+		return 0;
+
 	spin_lock_irqsave(&priv->rmw_lock, flags);
 
 	if (priv->stbyctrl) {
@@ -423,6 +428,11 @@ static void __init cpg_mssr_register_mod_clk(const struct mssr_mod_clk *mod,
 			init.flags |= CLK_IS_CRITICAL;
 			break;
 		}
+	for (i = 0; i < info->num_never_disable_mod_clks; i++)
+		if (id == info->never_disable_mod_clks[i]) {
+			clock->never_disable = true;
+			break;
+		}
 
 	parent_name = __clk_get_name(parent);
 	init.parent_names = &parent_name;
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
index 55a18ef..654d3a789 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.h
+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
@@ -105,6 +105,11 @@ struct device_node;
      * @crit_mod_clks: Array with Module Clock IDs of critical clocks that
      *                 should not be disabled without a knowledgeable driver
      * @num_crit_mod_clks: Number of entries in crit_mod_clks[]
+     * @never_disable_mod_clks: Array with Module Clock IDs of clocks that
+     *                          should not be disabled even if they seem to
+     *                          be unused
+     * @num_never_disable_mod_clks: Number of entries in
+     *                              never_disable_mod_clks[]
      *
      * @core_pm_clks: Array with IDs of Core Clocks that are suitable for Power
      *                Management, in addition to Module Clocks
@@ -141,6 +146,10 @@ struct cpg_mssr_info {
 	const unsigned int *crit_mod_clks;
 	unsigned int num_crit_mod_clks;
 
+	/* Module Clocks that should not be disabled even if unused */
+	const unsigned int *never_disable_mod_clks;
+	unsigned int num_never_disable_mod_clks;
+
 	/* Core Clocks suitable for PM, in addition to the Module Clocks */
 	const unsigned int *core_pm_clks;
 	unsigned int num_core_pm_clks;
-- 
2.7.4

[PATCH v3 2/3] clk: renesas: rcar-gen3: mark RWDT clocks as never-disable

[Ulrich Hecht]

Ensures RWDT remains alert throughout the boot process if enabled.

This patch applies the change to the following SoCs: r8a7795,
r8a7796, r8a77965, r8a77970, r8a77980, r8a77990 and r8a77995.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
---
 drivers/clk/renesas/r8a7795-cpg-mssr.c  | 6 +++++-
 drivers/clk/renesas/r8a7796-cpg-mssr.c  | 6 +++++-
 drivers/clk/renesas/r8a77965-cpg-mssr.c | 5 +++++
 drivers/clk/renesas/r8a77970-cpg-mssr.c | 6 +++++-
 drivers/clk/renesas/r8a77980-cpg-mssr.c | 6 +++++-
 drivers/clk/renesas/r8a77990-cpg-mssr.c | 5 +++++
 drivers/clk/renesas/r8a77995-cpg-mssr.c | 6 +++++-
 7 files changed, 35 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index ff5b302..3d055cb 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -289,7 +289,9 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
 static const unsigned int r8a7795_crit_mod_clks[] __initconst = {
 	MOD_CLK_ID(408),	/* INTC-AP (GIC) */
 };
-
+static const unsigned int r8a7795_never_disable_mod_clks[] __initconst = {
+	MOD_CLK_ID(402),	/* RWDT */
+};
 
 /*
  * CPG Clock Data
@@ -484,6 +486,8 @@ const struct cpg_mssr_info r8a7795_cpg_mssr_info __initconst = {
 	/* Critical Module Clocks */
 	.crit_mod_clks = r8a7795_crit_mod_clks,
 	.num_crit_mod_clks = ARRAY_SIZE(r8a7795_crit_mod_clks),
+	.never_disable_mod_clks = r8a7795_never_disable_mod_clks,
+	.num_never_disable_mod_clks = ARRAY_SIZE(r8a7795_never_disable_mod_clks),
 
 	/* Callbacks */
 	.init = r8a7795_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index e8d466d..77160ba 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -264,7 +264,9 @@ static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = {
 static const unsigned int r8a7796_crit_mod_clks[] __initconst = {
 	MOD_CLK_ID(408),	/* INTC-AP (GIC) */
 };
-
+static const unsigned int r8a7796_never_disable_mod_clks[] __initconst = {
+	MOD_CLK_ID(402),	/* RWDT */
+};
 
 /*
  * CPG Clock Data
@@ -364,6 +366,8 @@ const struct cpg_mssr_info r8a7796_cpg_mssr_info __initconst = {
 	/* Critical Module Clocks */
 	.crit_mod_clks = r8a7796_crit_mod_clks,
 	.num_crit_mod_clks = ARRAY_SIZE(r8a7796_crit_mod_clks),
+	.never_disable_mod_clks = r8a7796_never_disable_mod_clks,
+	.num_never_disable_mod_clks = ARRAY_SIZE(r8a7796_never_disable_mod_clks),
 
 	/* Callbacks */
 	.init = r8a7796_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index 7a05a2f..d09ac5e 100644
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -265,6 +265,9 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
 static const unsigned int r8a77965_crit_mod_clks[] __initconst = {
 	MOD_CLK_ID(408),	/* INTC-AP (GIC) */
 };
+static const unsigned int r8a77965_never_disable_mod_clks[] __initconst = {
+	MOD_CLK_ID(402),	/* RWDT */
+};
 
 /*
  * CPG Clock Data
@@ -350,6 +353,8 @@ const struct cpg_mssr_info r8a77965_cpg_mssr_info __initconst = {
 	/* Critical Module Clocks */
 	.crit_mod_clks		= r8a77965_crit_mod_clks,
 	.num_crit_mod_clks	= ARRAY_SIZE(r8a77965_crit_mod_clks),
+	.never_disable_mod_clks		= r8a77965_never_disable_mod_clks,
+	.num_never_disable_mod_clks	= ARRAY_SIZE(r8a77965_never_disable_mod_clks),
 
 	/* Callbacks */
 	.init			= r8a77965_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a77970-cpg-mssr.c b/drivers/clk/renesas/r8a77970-cpg-mssr.c
index cbed376..3a18499 100644
--- a/drivers/clk/renesas/r8a77970-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77970-cpg-mssr.c
@@ -167,7 +167,9 @@ static const struct mssr_mod_clk r8a77970_mod_clks[] __initconst = {
 static const unsigned int r8a77970_crit_mod_clks[] __initconst = {
 	MOD_CLK_ID(408),	/* INTC-AP (GIC) */
 };
-
+static const unsigned int r8a77970_never_disable_mod_clks[] __initconst = {
+	MOD_CLK_ID(402),	/* RWDT */
+};
 
 /*
  * CPG Clock Data
@@ -267,6 +269,8 @@ const struct cpg_mssr_info r8a77970_cpg_mssr_info __initconst = {
 	/* Critical Module Clocks */
 	.crit_mod_clks = r8a77970_crit_mod_clks,
 	.num_crit_mod_clks = ARRAY_SIZE(r8a77970_crit_mod_clks),
+	.never_disable_mod_clks = r8a77970_never_disable_mod_clks,
+	.num_never_disable_mod_clks = ARRAY_SIZE(r8a77970_never_disable_mod_clks),
 
 	/* Callbacks */
 	.init = r8a77970_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a77980-cpg-mssr.c b/drivers/clk/renesas/r8a77980-cpg-mssr.c
index 7227f67..eeb2377 100644
--- a/drivers/clk/renesas/r8a77980-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77980-cpg-mssr.c
@@ -182,7 +182,9 @@ static const struct mssr_mod_clk r8a77980_mod_clks[] __initconst = {
 static const unsigned int r8a77980_crit_mod_clks[] __initconst = {
 	MOD_CLK_ID(408),	/* INTC-AP (GIC) */
 };
-
+static const unsigned int r8a77980_never_disable_mod_clks[] __initconst = {
+	MOD_CLK_ID(402),	/* RWDT */
+};
 
 /*
  * CPG Clock Data
@@ -238,6 +240,8 @@ const struct cpg_mssr_info r8a77980_cpg_mssr_info __initconst = {
 	/* Critical Module Clocks */
 	.crit_mod_clks = r8a77980_crit_mod_clks,
 	.num_crit_mod_clks = ARRAY_SIZE(r8a77980_crit_mod_clks),
+	.never_disable_mod_clks = r8a77980_never_disable_mod_clks,
+	.num_never_disable_mod_clks = ARRAY_SIZE(r8a77980_never_disable_mod_clks),
 
 	/* Callbacks */
 	.init = r8a77980_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c
index 8eda2e3..daf7d63 100644
--- a/drivers/clk/renesas/r8a77990-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c
@@ -247,6 +247,9 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] __initconst = {
 static const unsigned int r8a77990_crit_mod_clks[] __initconst = {
 	MOD_CLK_ID(408),	/* INTC-AP (GIC) */
 };
+static const unsigned int r8a77990_never_disable_mod_clks[] __initconst = {
+	MOD_CLK_ID(402),	/* RWDT */
+};
 
 /*
  * CPG Clock Data
@@ -296,6 +299,8 @@ const struct cpg_mssr_info r8a77990_cpg_mssr_info __initconst = {
 	/* Critical Module Clocks */
 	.crit_mod_clks = r8a77990_crit_mod_clks,
 	.num_crit_mod_clks = ARRAY_SIZE(r8a77990_crit_mod_clks),
+	.never_disable_mod_clks = r8a77990_never_disable_mod_clks,
+	.num_never_disable_mod_clks = ARRAY_SIZE(r8a77990_never_disable_mod_clks),
 
 	/* Callbacks */
 	.init = r8a77990_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c
index 056ebf3..0a3c4d4 100644
--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c
@@ -185,7 +185,9 @@ static const struct mssr_mod_clk r8a77995_mod_clks[] __initconst = {
 static const unsigned int r8a77995_crit_mod_clks[] __initconst = {
 	MOD_CLK_ID(408),	/* INTC-AP (GIC) */
 };
-
+static const unsigned int r8a77995_never_disable_mod_clks[] __initconst = {
+	MOD_CLK_ID(402),	/* RWDT */
+};
 
 /*
  * CPG Clock Data
@@ -235,6 +237,8 @@ const struct cpg_mssr_info r8a77995_cpg_mssr_info __initconst = {
 	/* Critical Module Clocks */
 	.crit_mod_clks = r8a77995_crit_mod_clks,
 	.num_crit_mod_clks = ARRAY_SIZE(r8a77995_crit_mod_clks),
+	.never_disable_mod_clks = r8a77995_never_disable_mod_clks,
+	.num_never_disable_mod_clks = ARRAY_SIZE(r8a77995_never_disable_mod_clks),
 
 	/* Callbacks */
 	.init = r8a77995_cpg_mssr_init,
-- 
2.7.4

[PATCH v3 3/3] clk: renesas: rzg2: mark RWDT clock as never-disable

[Ulrich Hecht]

Ensures RWDT remains alert throughout the boot process if enabled.

This patch applies the change to the following SoCs: r8a774a1,
r8a774b1 and r8a774c0.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
---
 drivers/clk/renesas/r8a774a1-cpg-mssr.c | 5 +++++
 drivers/clk/renesas/r8a774b1-cpg-mssr.c | 5 +++++
 drivers/clk/renesas/r8a774c0-cpg-mssr.c | 5 +++++
 3 files changed, 15 insertions(+)

diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
index e05bfa2..be88403 100644
--- a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
@@ -239,6 +239,9 @@ static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = {
 static const unsigned int r8a774a1_crit_mod_clks[] __initconst = {
 	MOD_CLK_ID(408),	/* INTC-AP (GIC) */
 };
+static const unsigned int r8a774a1_never_disable_mod_clks[] __initconst = {
+	MOD_CLK_ID(402),	/* RWDT */
+};
 
 /*
  * CPG Clock Data
@@ -324,6 +327,8 @@ const struct cpg_mssr_info r8a774a1_cpg_mssr_info __initconst = {
 	/* Critical Module Clocks */
 	.crit_mod_clks = r8a774a1_crit_mod_clks,
 	.num_crit_mod_clks = ARRAY_SIZE(r8a774a1_crit_mod_clks),
+	.never_disable_mod_clks = r8a774a1_never_disable_mod_clks,
+	.num_never_disable_mod_clks = ARRAY_SIZE(r8a774a1_never_disable_mod_clks),
 
 	/* Callbacks */
 	.init = r8a774a1_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a774b1-cpg-mssr.c b/drivers/clk/renesas/r8a774b1-cpg-mssr.c
index c9af7091..230a82e 100644
--- a/drivers/clk/renesas/r8a774b1-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774b1-cpg-mssr.c
@@ -235,6 +235,9 @@ static const struct mssr_mod_clk r8a774b1_mod_clks[] __initconst = {
 static const unsigned int r8a774b1_crit_mod_clks[] __initconst = {
 	MOD_CLK_ID(408),	/* INTC-AP (GIC) */
 };
+static const unsigned int r8a774b1_never_disable_mod_clks[] __initconst = {
+	MOD_CLK_ID(402),	/* RWDT */
+};
 
 /*
  * CPG Clock Data
@@ -320,6 +323,8 @@ const struct cpg_mssr_info r8a774b1_cpg_mssr_info __initconst = {
 	/* Critical Module Clocks */
 	.crit_mod_clks = r8a774b1_crit_mod_clks,
 	.num_crit_mod_clks = ARRAY_SIZE(r8a774b1_crit_mod_clks),
+	.never_disable_mod_clks = r8a774b1_never_disable_mod_clks,
+	.num_never_disable_mod_clks = ARRAY_SIZE(r8a774b1_never_disable_mod_clks),
 
 	/* Callbacks */
 	.init = r8a774b1_cpg_mssr_init,
diff --git a/drivers/clk/renesas/r8a774c0-cpg-mssr.c b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
index f91e7a4..6bd74de 100644
--- a/drivers/clk/renesas/r8a774c0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
@@ -240,6 +240,9 @@ static const struct mssr_mod_clk r8a774c0_mod_clks[] __initconst = {
 static const unsigned int r8a774c0_crit_mod_clks[] __initconst = {
 	MOD_CLK_ID(408),	/* INTC-AP (GIC) */
 };
+static const unsigned int r8a774c0_never_disable_mod_clks[] __initconst = {
+	MOD_CLK_ID(402),	/* RWDT */
+};
 
 /*
  * CPG Clock Data
@@ -289,6 +292,8 @@ const struct cpg_mssr_info r8a774c0_cpg_mssr_info __initconst = {
 	/* Critical Module Clocks */
 	.crit_mod_clks = r8a774c0_crit_mod_clks,
 	.num_crit_mod_clks = ARRAY_SIZE(r8a774c0_crit_mod_clks),
+	.never_disable_mod_clks = r8a774c0_never_disable_mod_clks,
+	.num_never_disable_mod_clks = ARRAY_SIZE(r8a774c0_never_disable_mod_clks),
 
 	/* Callbacks */
 	.init = r8a774c0_cpg_mssr_init,
-- 
2.7.4

Re: [PATCH v3 0/3] clk: renesas: cpg-mssr: add never-disable option

[Geert Uytterhoeven]

CC clk

Complete series at
http://lore.kernel.org/r/1589214838-18075-1-git-send-email-uli+renesas@fpond.eu

On Mon, May 11, 2020 at 6:34 PM Ulrich Hecht <uli+renesas@fpond.eu> wrote:
> This revision should work more reliably as it keeps the never-disable
> handling in the clock driver instead of relying on the semantics of
> CLK_IGNORE_UNUSED, which still allows clocks to be turned off for power
> management.
>
> This series adds the option for declaring clocks as "never-disable", i.e.
> clocks that will not be turned on if not used, but also not turned off if
> unused. It also enables this option for the RWDT clocks in (almost) all
> SoCs.
>
> The point of this is to allow a WDT that has been enabled by the bootloader
> to survive these events:
>
> - deferred probing of the WDT device, which can lead the clock driver
>   to disable the WDT clock until the WDT is re-probed, giving it a
>   blind spot
> - probe failure in the WDT driver
>
> There are a number of Gen2 and RZ/G1 SoCs that have the RWDT clock declared
> as critical in order to allow SMP bringup code to work. These have been
> left as they are.
>
> CU
> Uli
>
>
> Changes since v2:
> - use the term "never-disable" instead of "ignore-unused"
> - do the handling internally instead of relying on the behavior of
>   CLK_IGNORE_UNUSED
>
> Changes since v1:
> - rename data structures for clarity
> - squash SoC-specific patches into one per family
>
>
> Ulrich Hecht (3):
>   clk: renesas: cpg-mssr: add support for never-disable clocks
>   clk: renesas: rcar-gen3: mark RWDT clocks as never-disable
>   clk: renesas: rzg2: mark RWDT clock as never-disable
>
>  drivers/clk/renesas/r8a774a1-cpg-mssr.c |  5 +++++
>  drivers/clk/renesas/r8a774b1-cpg-mssr.c |  5 +++++
>  drivers/clk/renesas/r8a774c0-cpg-mssr.c |  5 +++++
>  drivers/clk/renesas/r8a7795-cpg-mssr.c  |  6 +++++-
>  drivers/clk/renesas/r8a7796-cpg-mssr.c  |  6 +++++-
>  drivers/clk/renesas/r8a77965-cpg-mssr.c |  5 +++++
>  drivers/clk/renesas/r8a77970-cpg-mssr.c |  6 +++++-
>  drivers/clk/renesas/r8a77980-cpg-mssr.c |  6 +++++-
>  drivers/clk/renesas/r8a77990-cpg-mssr.c |  5 +++++
>  drivers/clk/renesas/r8a77995-cpg-mssr.c |  6 +++++-
>  drivers/clk/renesas/renesas-cpg-mssr.c  | 10 ++++++++++
>  drivers/clk/renesas/renesas-cpg-mssr.h  |  9 +++++++++
>  12 files changed, 69 insertions(+), 5 deletions(-)