From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: Julien Massot <julien.massot@iot.bzh>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH 0/5] clk: renesas: Add MFIS clock
Date: Fri, 11 Dec 2020 13:48:18 +0100 [thread overview]
Message-ID: <CAMuHMdUZOv=Or5JJZmAVwn2fjA=fP_texF9ZttKaHVY-YLjRCg@mail.gmail.com> (raw)
In-Reply-To: <TYBPR01MB53090FC98C72A3DA466C064786CB0@TYBPR01MB5309.jpnprd01.prod.outlook.com>
Hi Biju,
On Thu, Dec 10, 2020 at 4:47 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Subject: Re: [PATCH 0/5] clk: renesas: Add MFIS clock
> > On 12/10/20 3:57 PM, Biju Das wrote:
> > >> Subject: [PATCH 0/5] clk: renesas: Add MFIS clock
> > >>
> > >> This series adds the missing MFIS clocks for most Reneas R-Car Gen3
> > SoCs.
> > >> I have tested this series on E3, M3, and H3 based boards, I don't
> > >> have access to D3 nor V3 boards.
> > >
> > > Just a question, Can you explain what test have you done with MFIS
> > module?
> > A basic usage I did is to store and read a byte into one of the
> > communication register MFISARIICR / MFISAREMBR, a more complex usage is to
> > trigger interrupts between Linux and the realtime processor, using a
> > mailbox driver, that I didn't post yet.
>
> Thanks for the explanation.
>
> FYI, As per R-Car Gen3 HW manual RCar-D3 doesn't have RT Core.
But R-Car D3 still has (a subset of) the MFIS.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2020-12-11 12:50 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-10 14:20 [PATCH 0/5] clk: renesas: Add MFIS clock Julien Massot
2020-12-10 14:20 ` [PATCH 1/5] clk: renesas: r8a7795: " Julien Massot
2020-12-11 12:48 ` Geert Uytterhoeven
2020-12-10 14:20 ` [PATCH 2/5] clk: renesas: r8a7796: " Julien Massot
2020-12-11 12:49 ` Geert Uytterhoeven
2020-12-10 14:20 ` [PATCH 3/5] clk: renesas: r8a77965: " Julien Massot
2020-12-11 12:50 ` Geert Uytterhoeven
2020-12-10 14:20 ` [PATCH 4/5] clk: renesas: r8a77990: " Julien Massot
2020-12-11 12:50 ` Geert Uytterhoeven
2020-12-10 14:20 ` [PATCH 5/5] clk: renesas: r8a77995: " Julien Massot
2020-12-11 12:50 ` Geert Uytterhoeven
2020-12-10 14:57 ` [PATCH 0/5] clk: renesas: " Biju Das
2020-12-10 15:03 ` Julien Massot
2020-12-10 15:44 ` Biju Das
2020-12-11 12:48 ` Geert Uytterhoeven [this message]
2020-12-11 15:49 ` Biju Das
2020-12-11 12:52 ` Geert Uytterhoeven
2020-12-11 13:06 ` Julien Massot
2023-02-01 13:41 ` Geert Uytterhoeven
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