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* [PATCH 1/3] clk: renesas: r8a7795: Add RPC clocks
@ 2020-02-03  7:28 Dirk Behme
  2020-02-03  7:29 ` [PATCH 2/3] clk: renesas: r8a7796: " Dirk Behme
                   ` (3 more replies)
  0 siblings, 4 replies; 8+ messages in thread
From: Dirk Behme @ 2020-02-03  7:28 UTC (permalink / raw)
  To: sergei.shtylyov, geert+renesas, linux-renesas-soc; +Cc: dirk.behme

Describe the RPCSRC internal clock and the RPC[D2] clocks derived from it,
as well as the RPC-IF module clock, in the R-Car H3 (R8A7795) CPG/MSSR
driver.

Inspired by commit 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
---
Note: Patch done against today's clk-renesas in renesas-drivers.git

 drivers/clk/renesas/r8a7795-cpg-mssr.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index fbc8c75f4314..ff5b3020cb03 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -44,6 +44,7 @@ enum clk_ids {
 	CLK_S3,
 	CLK_SDSRC,
 	CLK_SSPSRC,
+	CLK_RPCSRC,
 	CLK_RINT,
 
 	/* Module Clocks */
@@ -70,6 +71,12 @@ static struct cpg_core_clk r8a7795_core_clks[] __initdata = {
 	DEF_FIXED(".s2",        CLK_S2,            CLK_PLL1_DIV2,  4, 1),
 	DEF_FIXED(".s3",        CLK_S3,            CLK_PLL1_DIV2,  6, 1),
 	DEF_FIXED(".sdsrc",     CLK_SDSRC,         CLK_PLL1_DIV2,  2, 1),
+	DEF_BASE(".rpcsrc",	CLK_RPCSRC, CLK_TYPE_GEN3_RPCSRC, CLK_PLL1),
+
+	DEF_BASE("rpc",		R8A7795_CLK_RPC, CLK_TYPE_GEN3_RPC,
+		 CLK_RPCSRC),
+	DEF_BASE("rpcd2",	R8A7795_CLK_RPCD2, CLK_TYPE_GEN3_RPCD2,
+		 R8A7795_CLK_RPC),
 
 	DEF_GEN3_OSC(".r",      CLK_RINT,          CLK_EXTAL,      32),
 
@@ -242,6 +249,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
 	DEF_MOD("can-fd",		 914,	R8A7795_CLK_S3D2),
 	DEF_MOD("can-if1",		 915,	R8A7795_CLK_S3D4),
 	DEF_MOD("can-if0",		 916,	R8A7795_CLK_S3D4),
+	DEF_MOD("rpc-if",		 917,	R8A7795_CLK_RPCD2),
 	DEF_MOD("i2c6",			 918,	R8A7795_CLK_S0D6),
 	DEF_MOD("i2c5",			 919,	R8A7795_CLK_S0D6),
 	DEF_MOD("i2c-dvfs",		 926,	R8A7795_CLK_CP),
-- 
2.20.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 2/3] clk: renesas: r8a7796: Add RPC clocks
  2020-02-03  7:28 [PATCH 1/3] clk: renesas: r8a7795: Add RPC clocks Dirk Behme
@ 2020-02-03  7:29 ` " Dirk Behme
  2020-02-06 15:47   ` Geert Uytterhoeven
  2020-02-03  7:29 ` [PATCH 3/3] clk: renesas: r8a77965: " Dirk Behme
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 8+ messages in thread
From: Dirk Behme @ 2020-02-03  7:29 UTC (permalink / raw)
  To: sergei.shtylyov, geert+renesas, linux-renesas-soc; +Cc: dirk.behme

Describe the RPCSRC internal clock and the RPC[D2] clocks derived from it,
as well as the RPC-IF module clock, in the R-Car M3 (R8A7796) CPG/MSSR
driver.

Inspired by commit 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
---
Note: Patch done against today's clk-renesas in renesas-drivers.git

 drivers/clk/renesas/r8a7796-cpg-mssr.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index e8420d3ada94..ba8e20d1ad75 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -46,6 +46,7 @@ enum clk_ids {
 	CLK_S3,
 	CLK_SDSRC,
 	CLK_SSPSRC,
+	CLK_RPCSRC,
 	CLK_RINT,
 
 	/* Module Clocks */
@@ -72,6 +73,12 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = {
 	DEF_FIXED(".s2",        CLK_S2,            CLK_PLL1_DIV2,  4, 1),
 	DEF_FIXED(".s3",        CLK_S3,            CLK_PLL1_DIV2,  6, 1),
 	DEF_FIXED(".sdsrc",     CLK_SDSRC,         CLK_PLL1_DIV2,  2, 1),
+	DEF_BASE(".rpcsrc",	CLK_RPCSRC, CLK_TYPE_GEN3_RPCSRC, CLK_PLL1),
+
+	DEF_BASE("rpc",		R8A7796_CLK_RPC, CLK_TYPE_GEN3_RPC,
+		 CLK_RPCSRC),
+	DEF_BASE("rpcd2",	R8A7796_CLK_RPCD2, CLK_TYPE_GEN3_RPCD2,
+		 R8A7796_CLK_RPC),
 
 	DEF_GEN3_OSC(".r",      CLK_RINT,          CLK_EXTAL,      32),
 
@@ -215,6 +222,7 @@ static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = {
 	DEF_MOD("can-fd",		 914,	R8A7796_CLK_S3D2),
 	DEF_MOD("can-if1",		 915,	R8A7796_CLK_S3D4),
 	DEF_MOD("can-if0",		 916,	R8A7796_CLK_S3D4),
+	DEF_MOD("rpc-if",		 917,	R8A7796_CLK_RPCD2),
 	DEF_MOD("i2c6",			 918,	R8A7796_CLK_S0D6),
 	DEF_MOD("i2c5",			 919,	R8A7796_CLK_S0D6),
 	DEF_MOD("i2c-dvfs",		 926,	R8A7796_CLK_CP),
-- 
2.20.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 3/3] clk: renesas: r8a77965: Add RPC clocks
  2020-02-03  7:28 [PATCH 1/3] clk: renesas: r8a7795: Add RPC clocks Dirk Behme
  2020-02-03  7:29 ` [PATCH 2/3] clk: renesas: r8a7796: " Dirk Behme
@ 2020-02-03  7:29 ` " Dirk Behme
  2020-02-06 15:47   ` Geert Uytterhoeven
  2020-02-06 15:46 ` [PATCH 1/3] clk: renesas: r8a7795: " Geert Uytterhoeven
  2020-02-10 14:17 ` Geert Uytterhoeven
  3 siblings, 1 reply; 8+ messages in thread
From: Dirk Behme @ 2020-02-03  7:29 UTC (permalink / raw)
  To: sergei.shtylyov, geert+renesas, linux-renesas-soc; +Cc: dirk.behme

Describe the RPCSRC internal clock and the RPC[D2] clocks derived from it,
as well as the RPC-IF module clock, in the R-Car M3N (R8A77965) CPG/MSSR
driver.

Inspired by commit 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
---
Note: Patch done against today's clk-renesas in renesas-drivers.git

 drivers/clk/renesas/r8a77965-cpg-mssr.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index b3af4da2ca74..2f86b15620fb 100644
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -43,6 +43,7 @@ enum clk_ids {
 	CLK_S3,
 	CLK_SDSRC,
 	CLK_SSPSRC,
+	CLK_RPCSRC,
 	CLK_RINT,
 
 	/* Module Clocks */
@@ -68,6 +69,12 @@ static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
 	DEF_FIXED(".s2",	CLK_S2,			CLK_PLL1_DIV2,	4, 1),
 	DEF_FIXED(".s3",	CLK_S3,			CLK_PLL1_DIV2,	6, 1),
 	DEF_FIXED(".sdsrc",	CLK_SDSRC,		CLK_PLL1_DIV2,	2, 1),
+	DEF_BASE(".rpcsrc",	CLK_RPCSRC, CLK_TYPE_GEN3_RPCSRC, CLK_PLL1),
+
+	DEF_BASE("rpc",		R8A77965_CLK_RPC, CLK_TYPE_GEN3_RPC,
+		 CLK_RPCSRC),
+	DEF_BASE("rpcd2",	R8A77965_CLK_RPCD2, CLK_TYPE_GEN3_RPCD2,
+		 R8A77965_CLK_RPC),
 
 	DEF_GEN3_OSC(".r",	CLK_RINT,		CLK_EXTAL,	32),
 
@@ -215,6 +222,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
 	DEF_MOD("can-fd",		914,	R8A77965_CLK_S3D2),
 	DEF_MOD("can-if1",		915,	R8A77965_CLK_S3D4),
 	DEF_MOD("can-if0",		916,	R8A77965_CLK_S3D4),
+	DEF_MOD("rpc-if",		917,	R8A77965_CLK_RPCD2),
 	DEF_MOD("i2c6",			918,	R8A77965_CLK_S0D6),
 	DEF_MOD("i2c5",			919,	R8A77965_CLK_S0D6),
 	DEF_MOD("i2c-dvfs",		926,	R8A77965_CLK_CP),
-- 
2.20.0


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 1/3] clk: renesas: r8a7795: Add RPC clocks
  2020-02-03  7:28 [PATCH 1/3] clk: renesas: r8a7795: Add RPC clocks Dirk Behme
  2020-02-03  7:29 ` [PATCH 2/3] clk: renesas: r8a7796: " Dirk Behme
  2020-02-03  7:29 ` [PATCH 3/3] clk: renesas: r8a77965: " Dirk Behme
@ 2020-02-06 15:46 ` " Geert Uytterhoeven
  2020-02-10 14:17 ` Geert Uytterhoeven
  3 siblings, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2020-02-06 15:46 UTC (permalink / raw)
  To: Dirk Behme; +Cc: Sergei Shtylyov, Geert Uytterhoeven, Linux-Renesas

Hi Dirk,

On Mon, Feb 3, 2020 at 8:29 AM Dirk Behme <dirk.behme@de.bosch.com> wrote:
> Describe the RPCSRC internal clock and the RPC[D2] clocks derived from it,
> as well as the RPC-IF module clock, in the R-Car H3 (R8A7795) CPG/MSSR
> driver.
>
> Inspired by commit 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").
>
> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>

Thanks for your patch!

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Before I queue this in clk-renesas-for-v5.7: given the fuzz with the RPC
driver, has this been tested successfully?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/3] clk: renesas: r8a7796: Add RPC clocks
  2020-02-03  7:29 ` [PATCH 2/3] clk: renesas: r8a7796: " Dirk Behme
@ 2020-02-06 15:47   ` Geert Uytterhoeven
  2020-02-07  5:19     ` Behme Dirk (CM/ESO2)
  0 siblings, 1 reply; 8+ messages in thread
From: Geert Uytterhoeven @ 2020-02-06 15:47 UTC (permalink / raw)
  To: Dirk Behme; +Cc: Sergei Shtylyov, Linux-Renesas

Hi Dirk,

On Mon, Feb 3, 2020 at 8:29 AM Dirk Behme <dirk.behme@de.bosch.com> wrote:
> Describe the RPCSRC internal clock and the RPC[D2] clocks derived from it,
> as well as the RPC-IF module clock, in the R-Car M3 (R8A7796) CPG/MSSR
> driver.
>
> Inspired by commit 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").
>
> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>

Thanks for your patch!

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Before I queue this in clk-renesas-for-v5.7: given the fuzz with the RPC
driver, has this been tested successfully?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 3/3] clk: renesas: r8a77965: Add RPC clocks
  2020-02-03  7:29 ` [PATCH 3/3] clk: renesas: r8a77965: " Dirk Behme
@ 2020-02-06 15:47   ` Geert Uytterhoeven
  0 siblings, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2020-02-06 15:47 UTC (permalink / raw)
  To: Dirk Behme; +Cc: Sergei Shtylyov, Linux-Renesas

Hi Dirk,

On Mon, Feb 3, 2020 at 8:29 AM Dirk Behme <dirk.behme@de.bosch.com> wrote:
> Describe the RPCSRC internal clock and the RPC[D2] clocks derived from it,
> as well as the RPC-IF module clock, in the R-Car M3N (R8A77965) CPG/MSSR
> driver.
>
> Inspired by commit 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").
>
> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>

Thanks for your patch!

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Before I queue this in clk-renesas-for-v5.7: given the fuzz with the RPC
driver, has this been tested successfully?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/3] clk: renesas: r8a7796: Add RPC clocks
  2020-02-06 15:47   ` Geert Uytterhoeven
@ 2020-02-07  5:19     ` Behme Dirk (CM/ESO2)
  0 siblings, 0 replies; 8+ messages in thread
From: Behme Dirk (CM/ESO2) @ 2020-02-07  5:19 UTC (permalink / raw)
  To: Geert Uytterhoeven; +Cc: Sergei Shtylyov, Linux-Renesas

Hi Geert,

On 06.02.2020 16:47, Geert Uytterhoeven wrote:
> Hi Dirk,
> 
> On Mon, Feb 3, 2020 at 8:29 AM Dirk Behme <dirk.behme@de.bosch.com> wrote:
>> Describe the RPCSRC internal clock and the RPC[D2] clocks derived from it,
>> as well as the RPC-IF module clock, in the R-Car M3 (R8A7796) CPG/MSSR
>> driver.
>>
>> Inspired by commit 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").
>>
>> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
> 
> Thanks for your patch!
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> Before I queue this in clk-renesas-for-v5.7: given the fuzz with the RPC
> driver, has this been tested successfully?


On a custom r8a7796 with 64MB Hyperflash attached I can read and write 
it via /dev/mtdx. Read data looks ok. Write data is byte swapped, but 
this is definitely a big-/little-endian driver issue. And not a clock one ;)

Best regards

Dirk




^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 1/3] clk: renesas: r8a7795: Add RPC clocks
  2020-02-03  7:28 [PATCH 1/3] clk: renesas: r8a7795: Add RPC clocks Dirk Behme
                   ` (2 preceding siblings ...)
  2020-02-06 15:46 ` [PATCH 1/3] clk: renesas: r8a7795: " Geert Uytterhoeven
@ 2020-02-10 14:17 ` Geert Uytterhoeven
  3 siblings, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2020-02-10 14:17 UTC (permalink / raw)
  To: Dirk Behme; +Cc: Sergei Shtylyov, Geert Uytterhoeven, Linux-Renesas

On Mon, Feb 3, 2020 at 8:29 AM Dirk Behme <dirk.behme@de.bosch.com> wrote:
> Describe the RPCSRC internal clock and the RPC[D2] clocks derived from it,
> as well as the RPC-IF module clock, in the R-Car H3 (R8A7795) CPG/MSSR
> driver.
>
> Inspired by commit 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").
>
> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>

Thanks, all 3 queued in clk-renesas-for-v5.7.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 8+ messages in thread

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Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-03  7:28 [PATCH 1/3] clk: renesas: r8a7795: Add RPC clocks Dirk Behme
2020-02-03  7:29 ` [PATCH 2/3] clk: renesas: r8a7796: " Dirk Behme
2020-02-06 15:47   ` Geert Uytterhoeven
2020-02-07  5:19     ` Behme Dirk (CM/ESO2)
2020-02-03  7:29 ` [PATCH 3/3] clk: renesas: r8a77965: " Dirk Behme
2020-02-06 15:47   ` Geert Uytterhoeven
2020-02-06 15:46 ` [PATCH 1/3] clk: renesas: r8a7795: " Geert Uytterhoeven
2020-02-10 14:17 ` Geert Uytterhoeven

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