From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B657C3A5A2 for ; Fri, 20 Sep 2019 14:54:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EBF15207E0 for ; Fri, 20 Sep 2019 14:54:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389217AbfITOyz (ORCPT ); Fri, 20 Sep 2019 10:54:55 -0400 Received: from mail-ot1-f65.google.com ([209.85.210.65]:34073 "EHLO mail-ot1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389185AbfITOyz (ORCPT ); Fri, 20 Sep 2019 10:54:55 -0400 Received: by mail-ot1-f65.google.com with SMTP id m19so4589068otp.1 for ; Fri, 20 Sep 2019 07:54:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=NDb30hKd9vs3z/WcUpB+wU4dKoX9DpnKApvtT8pobqs=; b=PM74Xxs0bzUwlFx0q7JtRyFtk0m4rmhAN2rsE4MPOF73KXg9gpv8dcNXnyJNNdJRvB rplBi1WiyncCGk1NrqLeZsPff241qCFITOAo1jC+OewIlUaVjmD54i+PN+nb0q+hLSfw bZ2Lgoq2KGe8kcDDOYjej0Iuo8bDjToxTfWluPKdFE+NuO+ziERhV5Qhuz1DZAcMFYxp arBGzn6UAoQ/EgAlVI++V16Rvxz0nf+cCTJNUbjAq/+hIMG29f4jlDFJuT4MVaRMxis1 SwWo5+kh4i+ZUVXEC/4wH806uWhnkyhM2eHVqqWzBsRoulZ9PNzd9LHuNHBOj7IU9HUv JDRA== X-Gm-Message-State: APjAAAX51EABsqb0RyVHDtct8n5n5VgreoDEgrVhadEiBWSx8Bk9IKZe TWSh7nEL+8JHUvA+GlgPitXnDVCkaU/KB3f+Ze8= X-Google-Smtp-Source: APXvYqw6eRX4aS/vz7UhWtah9Ici6Z2MWt+4J4lAwU6tkuuar4VNK7iTPl3RIqau00A1meWH35zyUoTzaBlygTY6EgA= X-Received: by 2002:a9d:404d:: with SMTP id o13mr6324206oti.39.1568991294343; Fri, 20 Sep 2019 07:54:54 -0700 (PDT) MIME-Version: 1.0 References: <1568881036-4404-1-git-send-email-biju.das@bp.renesas.com> <1568881036-4404-3-git-send-email-biju.das@bp.renesas.com> In-Reply-To: <1568881036-4404-3-git-send-email-biju.das@bp.renesas.com> From: Geert Uytterhoeven Date: Fri, 20 Sep 2019 16:54:42 +0200 Message-ID: Subject: Re: [PATCH v2 2/8] soc: renesas: rcar-sysc: Add r8a774b1 support To: Biju Das Cc: Geert Uytterhoeven , Simon Horman , Magnus Damm , Linux-Renesas , Chris Paterson , Fabrizio Castro Content-Type: text/plain; charset="UTF-8" Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Hi Biju, On Thu, Sep 19, 2019 at 10:17 AM Biju Das wrote: > Add support for RZ/G2N (R8A774B1) SoC power areas to the R-Car SYSC > driver. > > Signed-off-by: Biju Das Thanks for your patch! > --- /dev/null > +++ b/drivers/soc/renesas/r8a774b1-sysc.c > @@ -0,0 +1,35 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Renesas RZ/G2N System Controller > + * Copyright (C) 2019 Renesas Electronics Corp. > + * > + * Based on Renesas R-Car M3-W System Controller > + * Copyright (C) 2016 Glider bvba > + */ > + > +#include This include doesn't seem to be used? > +#include > + > +#include > + > +#include "rcar-sysc.h" > + > +static const struct rcar_sysc_area r8a774b1_areas[] __initconst = { > + { "always-on", 0, 0, R8A774B1_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, > + { "ca57-scu", 0x1c0, 0, R8A774B1_PD_CA57_SCU, R8A774B1_PD_ALWAYS_ON, > + PD_SCU }, > + { "ca57-cpu0", 0x80, 0, R8A774B1_PD_CA57_CPU0, R8A774B1_PD_CA57_SCU, > + PD_CPU_NOCR }, > + { "ca57-cpu1", 0x80, 1, R8A774B1_PD_CA57_CPU1, R8A774B1_PD_CA57_SCU, > + PD_CPU_NOCR }, > + { "a3vc", 0x380, 0, R8A774B1_PD_A3VC, R8A774B1_PD_ALWAYS_ON }, > + { "a3vp", 0x340, 0, R8A774B1_PD_A3VP, R8A774B1_PD_ALWAYS_ON }, > + { "a2vc1", 0x3c0, 1, R8A774B1_PD_A2VC1, R8A774B1_PD_A3VC }, > + { "3dg-a", 0x100, 0, R8A774B1_PD_3DG_A, R8A774B1_PD_ALWAYS_ON }, > + { "3dg-b", 0x100, 1, R8A774B1_PD_3DG_B, R8A774B1_PD_3DG_A }, > +}; > + > +const struct rcar_sysc_info r8a774b1_sysc_info __initconst = { > + .areas = r8a774b1_areas, > + .num_areas = ARRAY_SIZE(r8a774b1_areas), Given the Hardware User's Manual documents the presence of the SYSCEXTMASK register on RZ/G2N, you want to fill in the .extmask_{offs,val} fields, too. With the above fixed: Reviewed-by: Geert Uytterhoeven Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds