From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Rob Herring <robh+dt@kernel.org>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <marc.zyngier@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Simon Horman <horms@verge.net.au>,
Magnus Damm <magnus.damm@gmail.com>,
Chris Brandt <chris.brandt@renesas.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"open list:MEDIA DRIVERS FOR RENESAS - FCP"
<linux-renesas-soc@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 1/5] dt-bindings: interrupt-controller: Add Renesas RZ/A1 Interrupt Controller
Date: Tue, 30 Apr 2019 17:24:28 +0200 [thread overview]
Message-ID: <CAMuHMdW9h8u81NkvSH8jSoCK5g=dFzSGJzmknmc9x-dNkqOycg@mail.gmail.com> (raw)
In-Reply-To: <CAL_Jsq+KwOLqd=ZqT-bdM5mp8jfPHu=XingBb6kBsUqHvO=m+g@mail.gmail.com>
Hi Rob,
On Tue, Apr 30, 2019 at 5:03 PM Rob Herring <robh+dt@kernel.org> wrote:
> On Tue, Apr 30, 2019 at 7:13 AM Geert Uytterhoeven
> <geert+renesas@glider.be> wrote:
> >
> > Add DT bindings for the Renesas RZ/A1 Interrupt Controller.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> > v2:
> > - Add "renesas,gic-spi-base",
> > - Document RZ/A2M.
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rza1-irqc.txt
> > @@ -0,0 +1,30 @@
> > +DT bindings for the Renesas RZ/A1 Interrupt Controller
> > +
> > +The RZ/A1 Interrupt Controller is a front-end for the GIC found on Renesas
> > +RZ/A1 and RZ/A2 SoCs:
> > + - IRQ sense select for 8 external interrupts, 1:1-mapped to 8 GIC SPI
> > + interrupts,
> > + - NMI edge select.
> > +
> > +Required properties:
> > + - compatible: Must be "renesas,<soctype>-irqc", and "renesas,rza1-irqc" as
> > + fallback.
> > + Examples with soctypes are:
> > + - "renesas,r7s72100-irqc" (RZ/A1H)
> > + - "renesas,r7s9210-irqc" (RZ/A2M)
> > + - #interrupt-cells: Must be 2 (an interrupt index and flags, as defined
> > + in interrupts.txt in this directory)
> > + - interrupt-controller: Marks the device as an interrupt controller
> > + - reg: Base address and length of the memory resource used by the interrupt
> > + controller
> > + - renesas,gic-spi-base: Lowest GIC SPI interrupt number this block maps to.
>
> Why isn't this just an 'interrupts' property? Plus, without
Because Marc told me this is what everyone uses...
> 'interrupts' walking the hierarchy is broken.
What is "interrupts walking"? Can you please elaborate?
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2019-04-30 15:24 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-30 12:12 [PATCH v2 0/5] ARM: rskrza1: Add RZ/A1 IRQC and input switches Geert Uytterhoeven
2019-04-30 12:12 ` [PATCH v2 1/5] dt-bindings: interrupt-controller: Add Renesas RZ/A1 Interrupt Controller Geert Uytterhoeven
2019-04-30 15:02 ` Rob Herring
2019-04-30 15:24 ` Geert Uytterhoeven [this message]
2019-04-30 15:34 ` Marc Zyngier
2019-04-30 20:25 ` Rob Herring
2019-05-01 7:16 ` Geert Uytterhoeven
2019-05-01 19:38 ` Rob Herring
2019-05-02 10:01 ` Geert Uytterhoeven
2019-05-02 16:50 ` Rob Herring
2019-05-02 18:55 ` Geert Uytterhoeven
2019-05-02 14:02 ` Marc Zyngier
2019-05-02 16:33 ` Rob Herring
2019-04-30 12:12 ` [PATCH v2 2/5] irqchip: Add Renesas RZ/A1 Interrupt Controller driver Geert Uytterhoeven
2019-04-30 13:49 ` Chris Brandt
2019-04-30 12:12 ` [PATCH v2 3/5] soc: renesas: Enable RZ/A1 IRQC on RZ/A1H and RZ/A2M Geert Uytterhoeven
2019-04-30 12:12 ` [PATCH v2 4/5] ARM: dts: r7s72100: Add IRQC device node Geert Uytterhoeven
2019-04-30 12:12 ` [PATCH v3 5/5] ARM: dts: rskrza1: Add input switches Geert Uytterhoeven
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