From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-clk <linux-clk@vger.kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
"open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>,
Prabhakar <prabhakar.csengg@gmail.com>,
Biju Das <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH v2 07/12] dt-bindings: clock: renesas: Document RZ/G2L SoC CPG driver
Date: Tue, 8 Jun 2021 17:08:45 +0200 [thread overview]
Message-ID: <CAMuHMdX9En43TvWt_e5JyUOd7rV2AhMJsFqGi9OUnPs00jc=AQ@mail.gmail.com> (raw)
In-Reply-To: <20210603221758.10305-8-prabhakar.mahadev-lad.rj@bp.renesas.com>
Hi Prabhakar,
On Fri, Jun 4, 2021 at 12:18 AM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
> Document the device tree bindings of the Renesas RZ/G2L SoC clock
> driver in Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> Acked-by: Rob Herring <robh@kernel.org>
IIRC, Rob gave his R-b, not his A-b.
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml
> @@ -0,0 +1,80 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/clock/renesas,rzg2l-cpg.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Renesas RZ/G2L Clock Pulse Generator / Module Standby Mode
> +
> +maintainers:
> + - Geert Uytterhoeven <geert+renesas@glider.be>
> +
> +description: |
> + On Renesas RZ/G2L SoC, the CPG (Clock Pulse Generator) and Module
> + Standby Mode share the same register block.
> +
> + They provide the following functionalities:
> + - The CPG block generates various core clocks,
> + - The Module Standby Mode block provides two functions:
> + 1. Module Stop, providing a Clock Domain to control the clock supply
> + to individual SoC devices,
> + 2. Reset Control, to perform a software reset of individual SoC devices.
> +
> +properties:
> + compatible:
> + const: renesas,r9a07g044-cpg # RZ/G2{L,LC,UL}
Shouldn't RZ/G2UL use renesas,r9a07g043-cpg?
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + const: extal
> +
> + '#clock-cells':
> + description: |
> + - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
> + and a core clock reference, as defined in
> + <dt-bindings/clock/r9a07g044l-cpg.h>
r9a07g044-cpg.h
> + - For module clocks, the two clock specifier cells must be "CPG_MOD" and
> + a module number, as defined in the <dt-bindings/clock/r9a07g044l-cpg.h>.
r9a07g044-cpg.h
> + const: 2
> +
> + '#power-domain-cells':
> + description:
> + SoC devices that are part of the CPG/Module Standby Mode Clock Domain and
> + can be power-managed through Module Stop should refer to the CPG device
Module Standby
> + node in their "power-domains" property, as documented by the generic PM
> + Domain bindings in Documentation/devicetree/bindings/power/power-domain.yaml.
> + const: 0
> +
> + '#reset-cells':
> + description:
> + The single reset specifier cell must be the module number, as defined in
> + the <dt-bindings/clock/r9a07g044l-cpg.h>.
r9a07g044-cpg.h
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2021-06-08 15:08 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-03 22:17 [PATCH v2 00/12] Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK support Lad Prabhakar
2021-06-03 22:17 ` [PATCH v2 01/12] dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoC Lad Prabhakar
2021-06-08 15:23 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 02/12] dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} SoC variants Lad Prabhakar
2021-06-08 15:23 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 03/12] dt-bindings: arm: renesas: Document SMARC EVK Lad Prabhakar
2021-06-08 15:23 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 04/12] soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's Lad Prabhakar
2021-06-08 15:24 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 05/12] arm64: defconfig: Enable ARCH_R9A07G044 Lad Prabhakar
2021-06-08 15:24 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 06/12] clk: renesas: Define RZ/G2L CPG Clock Definitions Lad Prabhakar
2021-06-08 15:24 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 07/12] dt-bindings: clock: renesas: Document RZ/G2L SoC CPG driver Lad Prabhakar
2021-06-08 15:08 ` Geert Uytterhoeven [this message]
2021-06-03 22:17 ` [PATCH v2 08/12] clk: renesas: Add CPG core wrapper for RZ/G2L SoC Lad Prabhakar
2021-06-03 22:17 ` [PATCH v2 09/12] clk: renesas: Add support for R9A07G044 SoC Lad Prabhakar
2021-06-03 22:17 ` [PATCH v2 10/12] serial: sh-sci: Add support for RZ/G2L SoC Lad Prabhakar
2021-06-08 15:03 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 11/12] arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's Lad Prabhakar
2021-06-04 13:54 ` Biju Das
2021-06-09 7:01 ` Geert Uytterhoeven
2021-06-09 7:08 ` Biju Das
2021-06-09 6:52 ` Geert Uytterhoeven
2021-06-03 22:17 ` [PATCH v2 12/12] arm64: dts: renesas: Add initial device tree for RZ/G2L SMARC EVK Lad Prabhakar
2021-06-09 7:17 ` Geert Uytterhoeven
2021-06-09 7:55 ` Lad, Prabhakar
2021-06-07 11:00 ` [PATCH v2 00/12] Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK support Lad, Prabhakar
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