Re: [PATCH v6 2/2] pwm: Add support for RZ/G2L GPT

From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"linux-pwm@vger.kernel.org" <linux-pwm@vger.kernel.org>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Chris Paterson" <Chris.Paterson2@renesas.com>,
	"Biju Das" <biju.das@bp.renesas.com>,
	"Prabhakar Mahadev Lad" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"linux-renesas-soc@vger.kernel.org"
	<linux-renesas-soc@vger.kernel.org>,
	"linux-iio@vger.kernel.org" <linux-iio@vger.kernel.org>
Subject: Re: [PATCH v6 2/2] pwm: Add support for RZ/G2L GPT
Date: Mon, 26 Sep 2022 14:16:57 +0200	[thread overview]
Message-ID: <CAMuHMdXgtVk-f2XmdXVf19ZALfycjAZdDZVHxh-WNDGMn-OGBQ@mail.gmail.com> (raw)
In-Reply-To: <TYCPR01MB593348A5202E0E6619617AAF86529@TYCPR01MB5933.jpnprd01.prod.outlook.com>

Hi Biju,

On Mon, Sep 26, 2022 at 10:00 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Subject: Re: [PATCH v6 2/2] pwm: Add support for RZ/G2L GPT
> > On Sat, Sep 24, 2022 at 6:10 PM Biju Das <biju.das.jz@bp.renesas.com>
> > wrote:
> > > Note:
> > > I have a plan to develop another PWM driver using MTU IP on the same
> > SoC.
> > > The work is not started yet.
> >
> > That is the MTU3, which seems to be a further evolution of the MTU2 in
> > e.g. RZ/A1, which is already supported as a timer through the
> > sh_mtu2 driver?
>
> sh_mtu2 is just supports clock events. MTU2 is much powerful and we are
> not supporting more advanced features like phase counting(counter framework),
> PWM(frame wok) etc...

OK.

> > > For this IP, I planned to use MFD framework for the MTU driver and
> > > Will add counter driver, timer driver(clock source, clock event) and
> > > pwm driver as child devices.
> > >
> > > Currently the MFD driver and 16-Bit Phase Counting using counter
> > > framework is almost done.
> >
> > Do you really need an MFD? (MFDs trigger a red flag for me ;-) E.g.
>
> Similar concept is already available in mainline[1].
> See STM32 timers where there is an MFD driver supports timer, counter
> And pwm as child devices.
>
> [1] https://elixir.bootlin.com/linux/v6.0-rc5/C/ident/TIM_ARR
>
> > there are two sets of bindings for renesas,tpu: when #pwm-cells is
> > present, it is used for PWM, otherwise it is used as a timer.
>
> [2]
> Yes, we could encapsulate all in PWM. But then we need to call
> Other susbsytem from pwm (eg:- counter and timer).
>
> I am not sure, PWM subsystem people allows to call counter and
> Timer subsystem calls from pwm driver?? If yes, then that will simplifies a lot.
>
> [3]
> I almost have an RFC ready for MFD + 16-bit phase counting mode
> Using counter device with MTU3 which is tested on MTU{1,2} channels.
>
> So basically, we need to decide whether to go with approach [2]
> Or [3]??
>
> Please share your views, I can post RFC patch to get a clear picture
> if needed. Please let me know.

I see you've done your homework ;-) OK, fine for me!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds