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received-spf: None (protection.outlook.com: renesas.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: vKS4Qsb790L9cleSqww6DVcVBBh8Hl9EpbCbH0rQLQPExyWVMq41XDUx0oWW0hvs2vyJ9uY5jxqopWle9YacB0QBR62CK4ePTqJEO6jqPERp4+TISEADuU3xr3B4lr0AGINjxFE7X+4XeafcTAPEB4TEc5qlMimR0hAjPdTKwPDSKmAS069wI/JyUd64NVb7UhnrcIzm22Q4Sp29N1yQwuC9ms5J47yj0FQktX4W5oHyZ8SedzKoY1blgW8fZu/kf+oCEGkMzgjptejB7dNSv7fuqlTGGb0pFDZAOQR8nt0wbpUPWYZzYay/T7z+3kMdmE/QkQADP1dFZGp6PnclUwtzv3BqlxTDnUQ5kFoD6IzJVnT2LT17beIAvo/5Yedj8W6bU3SUvwOuW4rA/ClirHcGvQt4LoJiNoU82zFgUr0= Content-Type: text/plain; charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: renesas.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6d08fc73-23e3-4513-63a5-08d6d446df82 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 May 2019 06:23:38.0386 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: OSBPR01MB3591 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Hi Chris=1B$B$5$s=1B(B > From: Chris Brandt, Sent: Thursday, May 9, 2019 3:08 AM >=20 > Hi Shimoda=1B$B$5$s=1B(B >=20 > > From: Yoshihiro Shimoda > > Sent: Tuesday, May 07, 2019 5:17 AM > > > For the most part, the RZ/A2 has the same USB 2.0 host and device > > > HW as the R-Car Gen3, so we can reuse a lot of the code. > > > > > > However, there are a couple extra register bits, and the CFIFO > > > register 8-bit access works a little different (weird, no idea why). > > > > This is just my gut feeling, but if we set the BIGEND bit in the CFIFOS= EL > > of RZ/A2M (R-Car Gen3 doesn't have such a bit though), could the origin= al > > code work correctly? >=20 > I just tried to set CFIFOSEL.BIGEND =3D 1 Thank you for trying it! > * Set CFIFOSEL.BIGEND =3D 1 > * Write 8-bit values to CFIFO (same method as R-Car) > * Set CFIFOSEL.BIGEND =3D 0 >=20 > The result is bad. I got it... > But, then I tried this: > * Set CFIFOSEL.MBW =3D 0 (CFIFO port access =3D 8-bit) > * Write 8-bit values to CFIFO > * Set CFIFOSEL.MBW =3D 2 (CFIFO port access =3D 32-bit) >=20 > Code: > u16 cfifosel =3D usbhs_read(priv, fifo->sel); >=20 > usbhs_write(priv, fifo->sel, cfifosel & 0xF3FF); // MBW =3D 8-bit >=20 > for (i =3D 0; i < len; i++) > iowrite8(buf[i], addr); //same address each time >=20 > usbhs_write(priv, fifo->sel, cfifosel); // MBW =3D 32-bit >=20 >=20 > This method works good. I got it. > (I assume this method would work with R-Car also) Unfortunately, R-Car cannot work with this method... But, "iowrite8(buf[i], addr + 3);" or "iowrite32(buf[i], addr);" works on t= he R-Car. And then, I realized that R-Car CFIFO register allows 32-bit access only... # So, I'm asking HW guy whether the 8-bit access can be allowed or not now.= .. > But...then we have extra register reads and writes. > Register accesses are slower, so performance is lower. >=20 > So, I prefer my original method: > if (usbhsc_flags_has(priv, USBHSF_CFIFO_BYTE_ADDR)) > for (i =3D 0; i < len; i++) > iowrite8(buf[i], addr + (i & 0x03)); > else > for (i =3D 0; i < len; i++) > iowrite8(buf[i], addr + (0x03 - (i & 0x03))); >=20 >=20 > Do you agree? I agree. However, I have some comments about the patch. So, I'll reply on the patch = later. Best regards, Yoshihiro Shimoda > Chris