From: Lee Jones <lee@kernel.org>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: "Ulf Hansson" <ulf.hansson@linaro.org>,
"Maxime Ripard" <maxime@cerno.tech>,
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Subject: Re: [PATCH v2 35/65] clk: ux500: sysctrl: Add a determine_rate hook
Date: Mon, 14 Nov 2022 09:05:34 +0000 [thread overview]
Message-ID: <Y3IE3ta8hLLUcu7H@google.com> (raw)
In-Reply-To: <CACRpkdb8uYfs6w99FVjD_t6nZgDhPUx=yB1j=CmpHTHAM2QGQw@mail.gmail.com>
On Fri, 11 Nov 2022, Linus Walleij wrote:
> On Thu, Nov 10, 2022 at 2:05 PM Ulf Hansson <ulf.hansson@linaro.org> wrote:
> > On Thu, 10 Nov 2022 at 12:39, Linus Walleij <linus.walleij@linaro.org> wrote:
> > >
> > > On Thu, Nov 10, 2022 at 12:29 PM Ulf Hansson <ulf.hansson@linaro.org> wrote:
> > > > On Fri, 4 Nov 2022 at 14:32, Maxime Ripard <maxime@cerno.tech> wrote:
> > > > >
> > > > > The UX500 sysctrl "set_parent" clocks implement a mux with a set_parent
> > > > > hook, but doesn't provide a determine_rate implementation.
> > > > >
> > > > > This is a bit odd, since set_parent() is there to, as its name implies,
> > > > > change the parent of a clock. However, the most likely candidate to
> > > > > trigger that parent change is a call to clk_set_rate(), with
> > > > > determine_rate() figuring out which parent is the best suited for a
> > > > > given rate.
> > > > >
> > > > > The other trigger would be a call to clk_set_parent(), but it's far less
> > > > > used, and it doesn't look like there's any obvious user for that clock.
> > > >
> > > > If I recall correctly, that is the use case we did target for these
> > > > types of clocks. See sound/soc/ux500/ux500_ab85xx.c, for example.
> > >
> > > Hm I am trying to get that driver to work ... from time to time.
> > > It's just that ALSA SoC DT has changed to much that it turns out
> > > into a complete rewrite :/
> > >
> > > So in sound/soc/ux500/mop500_ab8500.c
> > > I see this:
> > >
> > > status = clk_set_parent(drvdata->clk_ptr_intclk, clk_ptr);
> > > if (status)
> > > (...)
> > >
> > > and there is elaborate code to switch between "SYSCLK" and
> > > "ULPCLK" (ulta-low power clock). Just like you say... however
> > > a clock named SYSCLK or ULPCLK does not appear in the
> > > code in drivers/clk/ux500 or any DT bindings so... it seems to
> > > be non-working for the time being.
> >
> > It's definitely not working, but the corresponding clocks ("ulpclk",
> > "intclk", "audioclk", etc) are being registered in ab8500_reg_clks().
> >
> > What seems to be missing is a DT conversion for these clocks, so they
> > can be consumed properly. Right?
>
> Yeps that and a few more things, I have a scratch rewrite here:
> https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git/log/?h=ux500-audio-rewrite
>
> I remember Lee said he had audio working with the mainline kernel
> on Snowball at one point, unfortunately I think that was before we
> started with the DT conversions and then we probably broke it.
That was also 100 years ago. :)
But yes, it used to work at one point.
--
Lee Jones [李琼斯]
next prev parent reply other threads:[~2022-11-14 9:07 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech>
[not found] ` <20221018-clk-range-checks-fixes-v2-56-f6736dec138e@cerno.tech>
2022-11-04 14:31 ` [PATCH v2 56/65] clk: ingenic: cgu: Switch to determine_rate Paul Cercueil
2022-11-04 14:59 ` Maxime Ripard
2022-11-04 17:35 ` Aidan MacDonald
2022-11-07 8:54 ` Maxime Ripard
2022-11-07 20:57 ` Aidan MacDonald
2022-11-09 11:00 ` Maxime Ripard
[not found] ` <06a293adc75990ed3e297b076fc38d8a.sboyd@kernel.org>
2023-03-23 15:35 ` Aidan MacDonald
2023-03-24 11:19 ` Maxime Ripard
2023-03-24 20:58 ` Aidan MacDonald
2023-03-27 19:24 ` Maxime Ripard
2023-04-05 12:57 ` Paul Cercueil
2023-04-05 14:50 ` Maxime Ripard
2023-04-05 15:29 ` Paul Cercueil
2022-11-05 10:33 ` Paul Cercueil
2022-11-09 10:53 ` Maxime Ripard
2022-11-09 11:36 ` Paul Cercueil
[not found] ` <20221018-clk-range-checks-fixes-v2-43-f6736dec138e@cerno.tech>
2022-11-04 15:44 ` [PATCH v2 43/65] ASoC: tlv320aic32x4: Add a determine_rate hook Mark Brown
2022-11-04 15:51 ` Maxime Ripard
2022-11-04 15:59 ` Mark Brown
2022-11-07 8:43 ` Maxime Ripard
2022-11-07 12:06 ` Mark Brown
2022-11-07 15:26 ` Maxime Ripard
2022-11-07 16:02 ` Mark Brown
[not found] ` <5819b1362f35ce306e1b6d566bfd44e5.sboyd@kernel.org>
2023-03-29 19:50 ` Maxime Ripard
[not found] ` <20221018-clk-range-checks-fixes-v2-21-f6736dec138e@cerno.tech>
2022-11-04 16:45 ` [PATCH v2 21/65] clk: davinci: da8xx-cfgchip: " David Lechner
2022-11-07 12:06 ` Maxime Ripard
2022-11-07 14:52 ` David Lechner
[not found] ` <20221018-clk-range-checks-fixes-v2-22-f6736dec138e@cerno.tech>
2022-11-04 16:46 ` [PATCH v2 22/65] " David Lechner
[not found] ` <20221018-clk-range-checks-fixes-v2-54-f6736dec138e@cerno.tech>
2022-11-04 16:49 ` [PATCH v2 54/65] clk: da8xx: clk48: Switch to determine_rate David Lechner
2022-11-07 14:52 ` Maxime Ripard
[not found] ` <20221018-clk-range-checks-fixes-v2-28-f6736dec138e@cerno.tech>
2022-11-07 7:51 ` [PATCH v2 28/65] clk: renesas: r9a06g032: Add a determine_rate hook Geert Uytterhoeven
[not found] ` <20221018-clk-range-checks-fixes-v2-65-f6736dec138e@cerno.tech>
2022-11-07 10:56 ` [PATCH v2 65/65] clk: Warn if we register a mux without determine_rate Charles Keepax
[not found] ` <20221018-clk-range-checks-fixes-v2-20-f6736dec138e@cerno.tech>
2022-11-07 10:58 ` [PATCH v2 20/65] clk: wm831x: clkout: Add a determine_rate hook Charles Keepax
[not found] ` <20221018-clk-range-checks-fixes-v2-34-f6736dec138e@cerno.tech>
2022-11-08 13:25 ` [PATCH v2 34/65] clk: ux500: prcmu: " Linus Walleij
2022-11-09 11:05 ` Maxime Ripard
[not found] ` <20221018-clk-range-checks-fixes-v2-35-f6736dec138e@cerno.tech>
2022-11-08 13:27 ` [PATCH v2 35/65] clk: ux500: sysctrl: " Linus Walleij
2022-11-10 11:28 ` Ulf Hansson
2022-11-10 11:39 ` Linus Walleij
2022-11-10 13:05 ` Ulf Hansson
2022-11-11 9:20 ` Linus Walleij
2022-11-14 9:05 ` Lee Jones [this message]
[not found] ` <20221018-clk-range-checks-fixes-v2-58-f6736dec138e@cerno.tech>
2022-11-09 2:43 ` [PATCH v2 58/65] clk: sprd: composite: Switch to determine_rate Chunyan Zhang
[not found] ` <20221018-clk-range-checks-fixes-v2-13-f6736dec138e@cerno.tech>
2022-11-13 22:35 ` [PATCH v2 13/65] clk: lmk04832: clkout: Add a determine_rate hook Liam Beguin
[not found] ` <f804380a14c346fdbbf3286bcb40b3c2.sboyd@kernel.org>
2023-03-22 10:01 ` [PATCH v2 00/65] clk: Make determine_rate mandatory for muxes Maxime Ripard
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