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From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: DRI Development <dri-devel@lists.freedesktop.org>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>
Subject: Re: [RESEND] [PATCH v2 1/2] dt-bindings: display: bridge: Add binding for R-Car MIPI DSI/CSI-2 TX
Date: Wed, 22 Sep 2021 04:26:49 +0300	[thread overview]
Message-ID: <YUqGWa6q+wYq2vAt@pendragon.ideasonboard.com> (raw)
In-Reply-To: <CAMuHMdVmTcERvHhLLDrZyC_TDLPU89ksitn0WduJkKqpePCKdg@mail.gmail.com>

Hi Geert,

On Tue, Sep 21, 2021 at 05:53:52PM +0200, Geert Uytterhoeven wrote:
> On Wed, Jul 28, 2021 at 6:26 PM Laurent Pinchart wrote:
> > The R-Car MIPI DSI/CSI-2 TX is embedded in the Renesas R-Car V3U SoC. It
> > can operate in either DSI or CSI-2 mode, with up to four data lanes.
> >
> > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Thanks for your patch!
> 
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml
> > @@ -0,0 +1,118 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Renesas R-Car MIPI DSI/CSI-2 Encoder
> > +
> > +maintainers:
> > +  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > +
> > +description: |
> > +  This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas
> > +  R-Car V3U SoC. The encoder can operate in either DSI or CSI-2 mode, with up
> > +  to four data lanes.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - renesas,r8a779a0-dsi-csi2-tx    # for V3U
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    items:
> > +      - description: Functional clock
> > +      - description: DSI (and CSI-2) functional clock
> > +      - description: PLL reference clock
> > +
> > +  clock-names:
> > +    items:
> > +      - const: fck
> > +      - const: dsi
> > +      - const: pll
> 
> No interrupts?
> The hardware manual says there are 9 interrupts.

Who comes up with such insanely high numbers of interrupts ? :-)

What the hardware manual doesn't document is how interrupts are mapped.
There's indeed 9 of them, and there are 9 interrupt sources, but that's
all we know. I can easily add a

  interrupts:
    maxItems: 9

but I can add interrupt names without additional information. It may be
possible to deduce some of the interrupt mappings from experiments, but
not all of them. What do you think would be a good way forward ? Leave
the interrupts out for now as we don't have the information ? Only list
the interrupts but not their names ? Something else ?

-- 
Regards,

Laurent Pinchart

  reply	other threads:[~2021-09-22  1:27 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-23 13:56 [PATCH v2 0/2] R-Car DU: Add DSI encoder driver for V3U Laurent Pinchart
2021-06-23 13:56 ` [PATCH v2 1/2] dt-bindings: display: bridge: Add binding for R-Car MIPI DSI/CSI-2 TX Laurent Pinchart
2021-06-23 13:56 ` [PATCH v2 2/2] drm: rcar-du: Add R-Car DSI driver Laurent Pinchart
2021-09-21 19:42   ` Andrzej Hajda
2021-09-22  1:29     ` Laurent Pinchart
2021-09-22 22:32       ` Laurent Pinchart
2021-09-28 20:48         ` Andrzej Hajda
2021-07-28 16:26 ` [RESEND] [PATCH v2 1/2] dt-bindings: display: bridge: Add binding for R-Car MIPI DSI/CSI-2 TX Laurent Pinchart
2021-08-02 22:37   ` Rob Herring
2021-08-03  5:03     ` Laurent Pinchart
2021-09-21 15:53   ` Geert Uytterhoeven
2021-09-22  1:26     ` Laurent Pinchart [this message]
2021-09-22  6:43       ` Geert Uytterhoeven
2021-09-22  8:08         ` Laurent Pinchart
2021-09-22 17:40           ` Geert Uytterhoeven

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