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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id n82sm13510377wma.42.2019.01.09.04.49.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 09 Jan 2019 04:49:27 -0800 (PST) Subject: Re: [PATCH V3] arm64: dts: r8a77990: ebisu: Add and enable SDHI device nodes To: Simon Horman Cc: Wolfram Sang , devicetree@vger.kernel.org, Takeshi Kihara , Marek Vasut , Geert Uytterhoeven , Yoshihiro Shimoda , linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20181106204647.18051-1-marek.vasut+renesas@gmail.com> <20190109104922.z6g772vgncdqqbqt@verge.net.au> <20190109105754.vvqx6uvsktvxeq7a@ninjato> <34cd1769-f0c9-0c2b-8947-4fceca9a9fb2@gmail.com> <20190109123259.cpql62omcvypafdu@verge.net.au> From: Marek Vasut Openpgp: preference=signencrypt Message-ID: Date: Wed, 9 Jan 2019 13:49:26 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.3.1 MIME-Version: 1.0 In-Reply-To: <20190109123259.cpql62omcvypafdu@verge.net.au> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org On 1/9/19 1:32 PM, Simon Horman wrote: > On Wed, Jan 09, 2019 at 01:02:00PM +0100, Marek Vasut wrote: >> On 1/9/19 11:57 AM, Wolfram Sang wrote: >>>> [ 3.373714] renesas_sdhi_internal_dmac ee100000.sd: mmc0 base at 0xee100000 max clock rate 200 MHz >>>> [ 3.456829] renesas_sdhi_internal_dmac ee120000.sd: mmc1 base at 0xee120000 max clock rate 200 MHz >>> >>> No mmc2 initialized. That should work regardless of eMMC. Probably >>> something wrong in the DT somewhere. >> >> Weird, it worked in next-20181102 with these patches, I just rechecked: >> >> 7818a9f06df1 mmc: renesas_sdhi: Whitelist R8A77990 SDHI >> a05a906776f8 pinctrl: sh-pfc: r8a77990: Add voltage switch operations >> for SDHI >> 2cc9d3a293e9 pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions >> 6b8d151613b7 pinctrl: sh-pfc: r8a77990: Add Audio SSI pins, groups and >> functions >> 9167b22938f7 pinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and >> functions >> 000cc50fc942 arm64: dts: r8a77990-ebisu: Enable HS200 of SDHI3 >> d3f59bbbf7ce arm64: dts: r8a77990-ebisu: Enable eMMC of SDHI3 >> 5928c59bff8d arm64: dts: r8a77990-ebisu: Enable UHS-I of SDHI0 and SDHI1 >> dae32a3172b8 arm64: dts: r8a77990-ebisu: Enable SD card of SDHI0 and SDHI1 >> 8feef039c6c6 arm64: dts: r8a77990: Add SDHI device nodes >> 25e9471b6a27 (tag: next-20181102) Add linux-next specific files for 20181102 >> >> I'll let you know once I figure it out. > > Could it be related to potentially old U-Boot etc.. on the board I am using? No, I don't think so (however, you should only use latest greatest of course :-) ). I see this on next/master, but not on next/20181224 right now, so I'm bisecting it down. -- Best regards, Marek Vasut