From: Atish Patra <atish.patra@wdc.com>
To: linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Damien Le Moal <Damien.LeMoal@wdc.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Dmitriy Cherkasov <dmitriy@oss-tech.org>,
Anup Patel <anup@brainfault.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Atish Patra <atish.patra@wdc.com>,
Rob Herring <robh+dt@kernel.org>,
Palmer Dabbelt <palmer@sifive.com>,
linux-riscv@lists.infradead.org,
Thomas Gleixner <tglx@linutronix.de>
Subject: [PATCH 0/4] Timer code cleanup.
Date: Mon, 3 Dec 2018 12:57:27 -0800 [thread overview]
Message-ID: <1543870651-16669-1-git-send-email-atish.patra@wdc.com> (raw)
This patch series provides an assorted timer cleanups in RISC-V.
Atish Patra (3):
RISC-V: Support per-hart timebase-frequency
RISC-V: Remove per cpu clocksource
RISC-V: Fix non-smp kernel boot on SMP systems
Palmer Dabbelt (1):
dt-bindings: Correct RISC-V's timebase-frequency
Documentation/devicetree/bindings/riscv/cpus.txt | 4 ++-
arch/riscv/kernel/time.c | 9 +-----
drivers/clocksource/riscv_timer.c | 39 ++++++++++++++++++++----
3 files changed, 37 insertions(+), 15 deletions(-)
--
2.7.4
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next reply other threads:[~2018-12-03 20:57 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-03 20:57 Atish Patra [this message]
2018-12-03 20:57 ` [PATCH 1/4] dt-bindings: Correct RISC-V's timebase-frequency Atish Patra
2018-12-07 16:29 ` Palmer Dabbelt
2018-12-03 20:57 ` [PATCH 2/4] RISC-V: Support per-hart timebase-frequency Atish Patra
2018-12-07 16:42 ` Palmer Dabbelt
2018-12-07 23:36 ` Atish Patra
2018-12-03 20:57 ` [PATCH 3/4] RISC-V: Remove per cpu clocksource Atish Patra
2018-12-07 17:00 ` Palmer Dabbelt
2018-12-03 20:57 ` [PATCH 4/4] RISC-V: Fix non-smp kernel boot on SMP systems Atish Patra
2018-12-07 17:00 ` Palmer Dabbelt
2018-12-07 23:31 ` Atish Patra
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