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* [PATCH v5 0/3] Extend dt bindings to support I2C on sifive devices and a fix broken IRQ in polling mode.
@ 2019-05-20 14:11 Sagar Shrikant Kadam
  2019-05-20 14:11 ` [PATCH v5 1/3] dt-bindings: i2c: extend existing opencore bindings Sagar Shrikant Kadam
                   ` (2 more replies)
  0 siblings, 3 replies; 10+ messages in thread
From: Sagar Shrikant Kadam @ 2019-05-20 14:11 UTC (permalink / raw)
  To: robh+dt, mark.rutland, peter, andrew, palmer, paul.walmsley,
	sagar.kadam, linux-i2c, devicetree, linux-riscv, linux-kernel

The patch is based on mainline v5.1 and extends DT-bindings for Opencore based I2C IP block reimplemented 
in FU540 SoC, available on HiFive unleashed board (Rev A00), and also provides a workaround for broken IRQ
which affects the already available I2C polling mode interface in mainline, for FU540-C000 chipsets. 

The polling mode workaround patch fixes the CPU stall issue, when-ever i2c transfer are initiated.

This workaround checks if it's a FU540 chipset based on device tree information, and check's for open
core's IF(interrupt flag) and TIP flags to break from the polling loop upon completion of transfer.

To test the patch, a PMOD-AD2 sensor is connected to HiFive Unleashed board over J1 connector, and 
appropriate device node is added into board specific device tree as per the information provided in 
dt-bindings in Documentation/devicetree/bindings/i2c/i2c-sifive.txt.
Without this workaround, the CPU stall's infinitely.

Busybox i2c utilities used to verify workaround : i2cdetect, i2cdump, i2cset, i2cget


Patch History:
v4<->V5:
-Removed un-necessary checks of OCORES_FLAG_BROKEN_IRQ.

V3<->V4:
-Incorporated suggestions on v3 patch as follows:
-OCORES_FLAG_BROKEN_IRQ BIT position rectified.
-Updated BORKEN_IRQ flag checks such that if sifive device (Fu540-C000) is identified,then use polling mode as IRQ is broken.

V2<->V3:
-Incorporated review comments on v2 patch as follows:
-Rectified compatibility string sequence with the most specific one at the first (dt bindings). 
-Moved interrupts and interrupt-parent under optional property list (dt-bindings).
-Updated reference to sifive-blocks-ip-versioning.txt and URL to IP repository used (dt-bindings).
-Removed example for i2c0 device node from binding doc (dt-bindings).
-Included sifive,i2c0 device under compatibility table in i2c-ocores driver (i2c-ocores).
-Updated polling mode hooks for SoC specific fix to handle broken IRQ (i2c-ocores).


V1<->V2:
-Incorporate review comments from Andrew
-Extend dt bindings into i2c-ocores.txt instead of adding new file
-Rename SIFIVE_FLAG_POLL to OCORES_FLAG_BROKEN_IRQ

V1:
-Update dt bindings for sifive i2c devices
-Fix broken IRQ affecting i2c polling mode interface.



Sagar Shrikant Kadam (3):
  dt-bindings: i2c: extend existing opencore bindings.
  i2c-ocores: sifive: add support for i2c device on FU540-c000 SoC.
  i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.

 .../devicetree/bindings/i2c/i2c-ocores.txt         |  7 ++++-
 drivers/i2c/busses/i2c-ocores.c                    | 31 ++++++++++++++++++++--
 2 files changed, 35 insertions(+), 3 deletions(-)

-- 
1.9.1


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^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v5 1/3] dt-bindings: i2c: extend existing opencore bindings.
  2019-05-20 14:11 [PATCH v5 0/3] Extend dt bindings to support I2C on sifive devices and a fix broken IRQ in polling mode Sagar Shrikant Kadam
@ 2019-05-20 14:11 ` Sagar Shrikant Kadam
  2019-05-20 14:36   ` Rob Herring
  2019-05-20 14:11 ` [PATCH v5 2/3] i2c-ocores: sifive: add support for i2c device on FU540-c000 SoC Sagar Shrikant Kadam
  2019-05-20 14:11 ` [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC Sagar Shrikant Kadam
  2 siblings, 1 reply; 10+ messages in thread
From: Sagar Shrikant Kadam @ 2019-05-20 14:11 UTC (permalink / raw)
  To: robh+dt, mark.rutland, peter, andrew, palmer, paul.walmsley,
	sagar.kadam, linux-i2c, devicetree, linux-riscv, linux-kernel

Add FU540-C000 specific device tree bindings to already
available i2-ocores file. This device is available on
HiFive Unleashed Rev A00 board. Move interrupt and interrupt
parents under optional property list as these can be optional.

The FU540-C000 SoC from sifive, has an Opencore's I2C block
reimplementation.

The DT compatibility string for this IP is present in HDL and available at.
https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/i2c/I2C.scala#L73

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
---
 Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
index 17bef9a..b73960e 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
@@ -2,8 +2,11 @@ Device tree configuration for i2c-ocores
 
 Required properties:
 - compatible      : "opencores,i2c-ocores" or "aeroflexgaisler,i2cmst"
+                    "sifive,fu540-c000-i2c" or "sifive,i2c0".
+		    for Opencore based I2C IP block reimplemented in
+		    FU540-C000 SoC.Please refer sifive-blocks-ip-versioning.txt
+		    for additional details.
 - reg             : bus address start and address range size of device
-- interrupts      : interrupt number
 - clocks          : handle to the controller clock; see the note below.
                     Mutually exclusive with opencores,ip-clock-frequency
 - opencores,ip-clock-frequency: frequency of the controller clock in Hz;
@@ -12,6 +15,8 @@ Required properties:
 - #size-cells     : should be <0>
 
 Optional properties:
+- interrupt-parent: handle to interrupt controller.
+- interrupts      : interrupt number.
 - clock-frequency : frequency of bus clock in Hz; see the note below.
                     Defaults to 100 KHz when the property is not specified
 - reg-shift       : device register offsets are shifted by this value
-- 
1.9.1


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^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v5 2/3] i2c-ocores: sifive: add support for i2c device on FU540-c000 SoC.
  2019-05-20 14:11 [PATCH v5 0/3] Extend dt bindings to support I2C on sifive devices and a fix broken IRQ in polling mode Sagar Shrikant Kadam
  2019-05-20 14:11 ` [PATCH v5 1/3] dt-bindings: i2c: extend existing opencore bindings Sagar Shrikant Kadam
@ 2019-05-20 14:11 ` Sagar Shrikant Kadam
  2019-05-20 14:11 ` [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC Sagar Shrikant Kadam
  2 siblings, 0 replies; 10+ messages in thread
From: Sagar Shrikant Kadam @ 2019-05-20 14:11 UTC (permalink / raw)
  To: robh+dt, mark.rutland, peter, andrew, palmer, paul.walmsley,
	sagar.kadam, linux-i2c, devicetree, linux-riscv, linux-kernel

Update device id table for Opencore's I2C master based re-implementation
used in FU540-c000 chipset on HiFive Unleashed platform.

Device ID's include Sifive, soc-specific device for chip specific tweaks
and sifive IP block specific device for generic programming model.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
---
 drivers/i2c/busses/i2c-ocores.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index 4e1a077..aee1d86 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -85,6 +85,7 @@ struct ocores_i2c {
 
 #define TYPE_OCORES		0
 #define TYPE_GRLIB		1
+#define TYPE_SIFIVE_REV0	2
 
 static void oc_setreg_8(struct ocores_i2c *i2c, int reg, u8 value)
 {
@@ -468,6 +469,14 @@ static u32 ocores_func(struct i2c_adapter *adap)
 		.compatible = "aeroflexgaisler,i2cmst",
 		.data = (void *)TYPE_GRLIB,
 	},
+	{
+		.compatible = "sifive,fu540-c000-i2c",
+		.data = (void *)TYPE_SIFIVE_REV0,
+	},
+	{
+		.compatible = "sifive,i2c0",
+		.data = (void *)TYPE_SIFIVE_REV0,
+	},
 	{},
 };
 MODULE_DEVICE_TABLE(of, ocores_i2c_match);
-- 
1.9.1


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^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.
  2019-05-20 14:11 [PATCH v5 0/3] Extend dt bindings to support I2C on sifive devices and a fix broken IRQ in polling mode Sagar Shrikant Kadam
  2019-05-20 14:11 ` [PATCH v5 1/3] dt-bindings: i2c: extend existing opencore bindings Sagar Shrikant Kadam
  2019-05-20 14:11 ` [PATCH v5 2/3] i2c-ocores: sifive: add support for i2c device on FU540-c000 SoC Sagar Shrikant Kadam
@ 2019-05-20 14:11 ` Sagar Shrikant Kadam
  2019-05-20 14:52   ` Andrew Lunn
  2019-05-21  8:33   ` Andreas Schwab
  2 siblings, 2 replies; 10+ messages in thread
From: Sagar Shrikant Kadam @ 2019-05-20 14:11 UTC (permalink / raw)
  To: robh+dt, mark.rutland, peter, andrew, palmer, paul.walmsley,
	sagar.kadam, linux-i2c, devicetree, linux-riscv, linux-kernel

The i2c-ocore driver already has a polling mode interface.But it needs
a workaround for FU540 Chipset on HiFive unleashed board (RevA00).
There is an erratum in FU540 chip that prevents interrupt driven i2c
transfers from working, and also the I2C controller's interrupt bit
cannot be cleared if set, due to this the existing i2c polling mode
interface added in mainline earlier doesn't work, and CPU stall's
infinitely, when-ever i2c transfer is initiated.

Ref:previous polling mode support in mainline

	commit 69c8c0c0efa8 ("i2c: ocores: add polling interface")

The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for
FU540-COOO SoC.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
---
 drivers/i2c/busses/i2c-ocores.c | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index aee1d86..c3bc97d 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -27,6 +27,7 @@
 #include <linux/jiffies.h>
 
 #define OCORES_FLAG_POLL BIT(0)
+#define OCORES_FLAG_BROKEN_IRQ BIT(1) /* Broken IRQ for FU540-C000 SoC */
 
 /*
  * 'process_lock' exists because ocores_process() and ocores_process_timeout()
@@ -239,9 +240,13 @@ static irqreturn_t ocores_isr(int irq, void *dev_id)
 	struct ocores_i2c *i2c = dev_id;
 	u8 stat = oc_getreg(i2c, OCI2C_STATUS);
 
-	if (!(stat & OCI2C_STAT_IF))
+	if (i2c->flags & OCORES_FLAG_BROKEN_IRQ) {
+		if (stat & OCI2C_STAT_IF)
+			if (!(stat & OCI2C_STAT_BUSY))
+				return IRQ_NONE;
+	} else if (!(stat & OCI2C_STAT_IF)) {
 		return IRQ_NONE;
-
+	}
 	ocores_process(i2c, stat);
 
 	return IRQ_HANDLED;
@@ -356,6 +361,11 @@ static void ocores_process_polling(struct ocores_i2c *i2c)
 		ret = ocores_isr(-1, i2c);
 		if (ret == IRQ_NONE)
 			break; /* all messages have been transferred */
+		else {
+			if (i2c->flags & OCORES_FLAG_BROKEN_IRQ)
+				if (i2c->state == STATE_DONE)
+					break;
+		}
 	}
 }
 
@@ -601,6 +611,7 @@ static int ocores_i2c_probe(struct platform_device *pdev)
 {
 	struct ocores_i2c *i2c;
 	struct ocores_i2c_platform_data *pdata;
+	const struct of_device_id *match;
 	struct resource *res;
 	int irq;
 	int ret;
@@ -683,6 +694,13 @@ static int ocores_i2c_probe(struct platform_device *pdev)
 	irq = platform_get_irq(pdev, 0);
 	if (irq == -ENXIO) {
 		i2c->flags |= OCORES_FLAG_POLL;
+		/*
+		 * Set in OCORES_FLAG_BROKEN_IRQ to enable workaround for
+		 * FU540-C000 SoC in polling mode.
+		 */
+		match = of_match_node(ocores_i2c_match, pdev->dev.of_node);
+		if (match && (long)match->data == TYPE_SIFIVE_REV0)
+			i2c->flags |= OCORES_FLAG_BROKEN_IRQ;
 	} else {
 		if (irq < 0)
 			return irq;
-- 
1.9.1


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^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 1/3] dt-bindings: i2c: extend existing opencore bindings.
  2019-05-20 14:11 ` [PATCH v5 1/3] dt-bindings: i2c: extend existing opencore bindings Sagar Shrikant Kadam
@ 2019-05-20 14:36   ` Rob Herring
  2019-05-21  3:48     ` Sagar Kadam
  0 siblings, 1 reply; 10+ messages in thread
From: Rob Herring @ 2019-05-20 14:36 UTC (permalink / raw)
  To: Sagar Shrikant Kadam
  Cc: Mark Rutland, Andrew Lunn, peter, devicetree, Palmer Dabbelt,
	linux-kernel, Linux I2C, Paul Walmsley, linux-riscv

On Mon, May 20, 2019 at 9:12 AM Sagar Shrikant Kadam
<sagar.kadam@sifive.com> wrote:
>
> Add FU540-C000 specific device tree bindings to already
> available i2-ocores file. This device is available on
> HiFive Unleashed Rev A00 board. Move interrupt and interrupt
> parents under optional property list as these can be optional.
>
> The FU540-C000 SoC from sifive, has an Opencore's I2C block
> reimplementation.
>
> The DT compatibility string for this IP is present in HDL and available at.
> https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/i2c/I2C.scala#L73
>
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
> ---
>  Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
> index 17bef9a..b73960e 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
> +++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
> @@ -2,8 +2,11 @@ Device tree configuration for i2c-ocores
>
>  Required properties:
>  - compatible      : "opencores,i2c-ocores" or "aeroflexgaisler,i2cmst"
> +                    "sifive,fu540-c000-i2c" or "sifive,i2c0".

It's not an OR because both are required. Please reformat to 1 valid
combination per line.

> +                   for Opencore based I2C IP block reimplemented in
> +                   FU540-C000 SoC.Please refer sifive-blocks-ip-versioning.txt
> +                   for additional details.
>  - reg             : bus address start and address range size of device
> -- interrupts      : interrupt number
>  - clocks          : handle to the controller clock; see the note below.
>                      Mutually exclusive with opencores,ip-clock-frequency
>  - opencores,ip-clock-frequency: frequency of the controller clock in Hz;
> @@ -12,6 +15,8 @@ Required properties:
>  - #size-cells     : should be <0>
>
>  Optional properties:
> +- interrupt-parent: handle to interrupt controller.

Drop this. interrupt-parent is implied.

> +- interrupts      : interrupt number.
>  - clock-frequency : frequency of bus clock in Hz; see the note below.
>                      Defaults to 100 KHz when the property is not specified
>  - reg-shift       : device register offsets are shifted by this value
> --
> 1.9.1
>

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^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.
  2019-05-20 14:11 ` [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC Sagar Shrikant Kadam
@ 2019-05-20 14:52   ` Andrew Lunn
  2019-05-20 15:20     ` Sagar Kadam
  2019-05-21  8:33   ` Andreas Schwab
  1 sibling, 1 reply; 10+ messages in thread
From: Andrew Lunn @ 2019-05-20 14:52 UTC (permalink / raw)
  To: Sagar Shrikant Kadam
  Cc: mark.rutland, devicetree, peter, palmer, linux-kernel, robh+dt,
	linux-i2c, paul.walmsley, linux-riscv

On Mon, May 20, 2019 at 07:41:18PM +0530, Sagar Shrikant Kadam wrote:
> The i2c-ocore driver already has a polling mode interface.But it needs
> a workaround for FU540 Chipset on HiFive unleashed board (RevA00).
> There is an erratum in FU540 chip that prevents interrupt driven i2c
> transfers from working, and also the I2C controller's interrupt bit
> cannot be cleared if set, due to this the existing i2c polling mode
> interface added in mainline earlier doesn't work, and CPU stall's
> infinitely, when-ever i2c transfer is initiated.
> 
> Ref:previous polling mode support in mainline
> 
> 	commit 69c8c0c0efa8 ("i2c: ocores: add polling interface")
> 
> The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for
> FU540-COOO SoC.
> 
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>

Much better, thanks.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

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^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.
  2019-05-20 14:52   ` Andrew Lunn
@ 2019-05-20 15:20     ` Sagar Kadam
  0 siblings, 0 replies; 10+ messages in thread
From: Sagar Kadam @ 2019-05-20 15:20 UTC (permalink / raw)
  To: Andrew Lunn
  Cc: mark.rutland, devicetree, peter, Palmer Dabbelt, linux-kernel,
	robh+dt, linux-i2c, Paul Walmsley, linux-riscv

On Mon, May 20, 2019 at 8:22 PM Andrew Lunn <andrew@lunn.ch> wrote:
>
> On Mon, May 20, 2019 at 07:41:18PM +0530, Sagar Shrikant Kadam wrote:
> > The i2c-ocore driver already has a polling mode interface.But it needs
> > a workaround for FU540 Chipset on HiFive unleashed board (RevA00).
> > There is an erratum in FU540 chip that prevents interrupt driven i2c
> > transfers from working, and also the I2C controller's interrupt bit
> > cannot be cleared if set, due to this the existing i2c polling mode
> > interface added in mainline earlier doesn't work, and CPU stall's
> > infinitely, when-ever i2c transfer is initiated.
> >
> > Ref:previous polling mode support in mainline
> >
> >       commit 69c8c0c0efa8 ("i2c: ocores: add polling interface")
> >
> > The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for
> > FU540-COOO SoC.
> >
> > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
>
> Much better, thanks.
My pleasure Andrew.
Appreciate your timely review and response.

>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
>
>     Andrew

Thanks,
Sagar

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^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 1/3] dt-bindings: i2c: extend existing opencore bindings.
  2019-05-20 14:36   ` Rob Herring
@ 2019-05-21  3:48     ` Sagar Kadam
  0 siblings, 0 replies; 10+ messages in thread
From: Sagar Kadam @ 2019-05-21  3:48 UTC (permalink / raw)
  To: Rob Herring
  Cc: Mark Rutland, Andrew Lunn, peter, devicetree, Palmer Dabbelt,
	linux-kernel, Linux I2C, Paul Walmsley, linux-riscv

Hi Rob,


On Mon, May 20, 2019 at 8:07 PM Rob Herring <robh+dt@kernel.org> wrote:
>
> On Mon, May 20, 2019 at 9:12 AM Sagar Shrikant Kadam
> <sagar.kadam@sifive.com> wrote:
> >
> > Add FU540-C000 specific device tree bindings to already
> > available i2-ocores file. This device is available on
> > HiFive Unleashed Rev A00 board. Move interrupt and interrupt
> > parents under optional property list as these can be optional.
> >
> > The FU540-C000 SoC from sifive, has an Opencore's I2C block
> > reimplementation.
> >
> > The DT compatibility string for this IP is present in HDL and available at.
> > https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/i2c/I2C.scala#L73
> >
> > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
> > ---
> >  Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 7 ++++++-
> >  1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
> > index 17bef9a..b73960e 100644
> > --- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
> > +++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
> > @@ -2,8 +2,11 @@ Device tree configuration for i2c-ocores
> >
> >  Required properties:
> >  - compatible      : "opencores,i2c-ocores" or "aeroflexgaisler,i2cmst"
> > +                    "sifive,fu540-c000-i2c" or "sifive,i2c0".
>
> It's not an OR because both are required. Please reformat to 1 valid
> combination per line.
Yes, will rectify it in V6.

> > +                   for Opencore based I2C IP block reimplemented in
> > +                   FU540-C000 SoC.Please refer sifive-blocks-ip-versioning.txt
> > +                   for additional details.
> >  - reg             : bus address start and address range size of device
> > -- interrupts      : interrupt number
> >  - clocks          : handle to the controller clock; see the note below.
> >                      Mutually exclusive with opencores,ip-clock-frequency
> >  - opencores,ip-clock-frequency: frequency of the controller clock in Hz;
> > @@ -12,6 +15,8 @@ Required properties:
> >  - #size-cells     : should be <0>
> >
> >  Optional properties:
> > +- interrupt-parent: handle to interrupt controller.
>
> Drop this. interrupt-parent is implied.
>
Sure, will exclude it in v6.

> > +- interrupts      : interrupt number.
> >  - clock-frequency : frequency of bus clock in Hz; see the note below.
> >                      Defaults to 100 KHz when the property is not specified
> >  - reg-shift       : device register offsets are shifted by this value
> > --
> > 1.9.1
> >
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Thanks,
Sagar

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^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.
  2019-05-20 14:11 ` [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC Sagar Shrikant Kadam
  2019-05-20 14:52   ` Andrew Lunn
@ 2019-05-21  8:33   ` Andreas Schwab
  2019-05-21  8:57     ` Sagar Kadam
  1 sibling, 1 reply; 10+ messages in thread
From: Andreas Schwab @ 2019-05-21  8:33 UTC (permalink / raw)
  To: Sagar Shrikant Kadam
  Cc: mark.rutland, andrew, peter, devicetree, palmer, linux-kernel,
	robh+dt, linux-i2c, paul.walmsley, linux-riscv

On Mai 20 2019, Sagar Shrikant Kadam <sagar.kadam@sifive.com> wrote:

> The i2c-ocore driver already has a polling mode interface.But it needs
> a workaround for FU540 Chipset on HiFive unleashed board (RevA00).
> There is an erratum in FU540 chip that prevents interrupt driven i2c
> transfers from working, and also the I2C controller's interrupt bit
> cannot be cleared if set, due to this the existing i2c polling mode
> interface added in mainline earlier doesn't work, and CPU stall's
> infinitely, when-ever i2c transfer is initiated.
>
> Ref:previous polling mode support in mainline
>
> 	commit 69c8c0c0efa8 ("i2c: ocores: add polling interface")
>
> The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for
> FU540-COOO SoC.

After commit dd7dbf0eb090 this no longer fits.

Andreas.

-- 
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

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^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.
  2019-05-21  8:33   ` Andreas Schwab
@ 2019-05-21  8:57     ` Sagar Kadam
  0 siblings, 0 replies; 10+ messages in thread
From: Sagar Kadam @ 2019-05-21  8:57 UTC (permalink / raw)
  To: Andreas Schwab
  Cc: Mark Rutland, Andrew Lunn, peter, devicetree, Palmer Dabbelt,
	linux-kernel, Rob Herring, Linux I2C, Paul Walmsley, linux-riscv

Thanks Andreas,
Yes, I rebased to v5.2-rc1 and observed that there have been changes
in polling interface, and i2c->flags is not longer being used for
setting the polling mode. I am working on a way to hook in the fix for
broken IRQ and will submit it in v6.

Thanks & BR,
Sagar Kadam

On Tue, May 21, 2019 at 2:03 PM Andreas Schwab <schwab@suse.de> wrote:
>
> On Mai 20 2019, Sagar Shrikant Kadam <sagar.kadam@sifive.com> wrote:
>
> > The i2c-ocore driver already has a polling mode interface.But it needs
> > a workaround for FU540 Chipset on HiFive unleashed board (RevA00).
> > There is an erratum in FU540 chip that prevents interrupt driven i2c
> > transfers from working, and also the I2C controller's interrupt bit
> > cannot be cleared if set, due to this the existing i2c polling mode
> > interface added in mainline earlier doesn't work, and CPU stall's
> > infinitely, when-ever i2c transfer is initiated.
> >
> > Ref:previous polling mode support in mainline
> >
> >       commit 69c8c0c0efa8 ("i2c: ocores: add polling interface")
> >
> > The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for
> > FU540-COOO SoC.
>
> After commit dd7dbf0eb090 this no longer fits.
>
> Andreas.
>
> --
> Andreas Schwab, SUSE Labs, schwab@suse.de
> GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
> "And now for something completely different."

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^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, back to index

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-20 14:11 [PATCH v5 0/3] Extend dt bindings to support I2C on sifive devices and a fix broken IRQ in polling mode Sagar Shrikant Kadam
2019-05-20 14:11 ` [PATCH v5 1/3] dt-bindings: i2c: extend existing opencore bindings Sagar Shrikant Kadam
2019-05-20 14:36   ` Rob Herring
2019-05-21  3:48     ` Sagar Kadam
2019-05-20 14:11 ` [PATCH v5 2/3] i2c-ocores: sifive: add support for i2c device on FU540-c000 SoC Sagar Shrikant Kadam
2019-05-20 14:11 ` [PATCH v5 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC Sagar Shrikant Kadam
2019-05-20 14:52   ` Andrew Lunn
2019-05-20 15:20     ` Sagar Kadam
2019-05-21  8:33   ` Andreas Schwab
2019-05-21  8:57     ` Sagar Kadam

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