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Date: Wed, 29 May 2019 09:57:24 +0530 Message-Id: <1559104047-13920-1-git-send-email-sagar.kadam@sifive.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190528_212745_617982_64107C34 X-CRM114-Status: GOOD ( 11.10 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org The patch is based on mainline v5.2-rc1 and extends DT-bindings for Opencore based I2C IP block reimplemented in FU540 SoC, available on HiFive unleashed board (Rev A00), and also provides a workaround for broken IRQ which affects the already available I2C polling mode interface in mainline, for FU540-C000 chipsets. The polling mode workaround patch fixes the CPU stall issue, when-ever i2c transfer are initiated. This workaround checks if it's a FU540 chipset based on device tree information, and check's for open core's IF(interrupt flag) and BUSY flags to break from the polling loop upon completion of transfer. To test the patch, a PMOD-AD2 sensor is connected to HiFive Unleashed board over J1 connector, and appropriate device node is added into board specific device tree as per the information provided in dt-bindings in Documentation/devicetree/bindings/i2c/i2c-ocores.txt. Without this workaround, the CPU stall's infinitely. Busybox i2c utilities used to verify workaround : i2cdetect, i2cdump, i2cset, i2cget Patch History: V7<->V8: -Incorporated review comments for cosmetic changes like: space, comma and period(.) V6<->V7: -Rectified space and tab issue in dt bindings strings. -Implemented workaround based on i2c->flags, as per review comment on v6. V5<->V6: -Incorporated suggestions on v5 patch as follows: -Reformatted compatibility strings in dt doc with one valid combination on each line. -Removed interrupt-parents from optional property list. -With rebase to v5.2-rc1, the v5 variant of polling workaround PATCH becomes in-compatible. Till kernel v5.1 the polling mode was enabled based on i2c->flags, wherease in kernel v5.2-rc1 polling mode is set as master transfer algorithim at probe time itself, and i2c->flags checks are removed. -Modified v5 to check for SiFive device type in polling function and include the workaround/fix for broken IRQ. v4<->V5: -Removed un-necessary checks of OCORES_FLAG_BROKEN_IRQ. V3<->V4: -Incorporated suggestions on v3 patch as follows: -OCORES_FLAG_BROKEN_IRQ BIT position rectified. -Updated BORKEN_IRQ flag checks such that if sifive device (Fu540-C000) is identified,then use polling mode as IRQ is broken. V2<->V3: -Incorporated review comments on v2 patch as follows: -Rectified compatibility string sequence with the most specific one at the first (dt bindings). -Moved interrupts and interrupt-parent under optional property list (dt-bindings). -Updated reference to sifive-blocks-ip-versioning.txt and URL to IP repository used (dt-bindings). -Removed example for i2c0 device node from binding doc (dt-bindings). -Included sifive,i2c0 device under compatibility table in i2c-ocores driver (i2c-ocores). -Updated polling mode hooks for SoC specific fix to handle broken IRQ (i2c-ocores). V1<->V2: -Incorporate review comments from Andrew -Extend dt bindings into i2c-ocores.txt instead of adding new file -Rename SIFIVE_FLAG_POLL to OCORES_FLAG_BROKEN_IRQ V1: -Update dt bindings for sifive i2c devices -Fix broken IRQ affecting i2c polling mode interface. Sagar Shrikant Kadam (3): dt-bindings: i2c: extend existing opencore bindings. i2c-ocores: sifive: add support for i2c device on FU540-c000 SoC. i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC. .../devicetree/bindings/i2c/i2c-ocores.txt | 9 ++++-- drivers/i2c/busses/i2c-ocores.c | 33 ++++++++++++++++++++-- 2 files changed, 38 insertions(+), 4 deletions(-) -- 1.9.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv