* [PATCH v9 0/2] mtd: spi-nor: add support for is25wp256 spi-nor flash
@ 2019-09-18 16:01 Sagar Shrikant Kadam
2019-09-18 16:01 ` [PATCH v9 1/2] mtd: spi-nor: add support for is25wp256 Sagar Shrikant Kadam
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Sagar Shrikant Kadam @ 2019-09-18 16:01 UTC (permalink / raw)
To: marek.vasut, tudor.ambarus, dwmw2, computersforpeace,
miquel.raynal, richard, vigneshr
Cc: aou, palmer, linux-kernel, linux-mtd, Sagar Shrikant Kadam,
paul.walmsley, linux-riscv
The patch series adds basic support for 32MiB spi-nor is25wp256 present on HiFive
Unleashed A00 board. The flash device gets BFPT_DWORD1_ADDRESS_BYTES_3_ONLY
from BFPT table for address width, whereas the flash can support 4 byte
address width, so the address width is configured by using the post bfpt
fixup hook as done for is25lp256 device in
commit cf580a924005 ("mtd: spi-nor: fix nor->addr_width when its value
configured from SFDP does not match the actual width")
Patches are based on original work done by Wesley Terpstra and/or
Palmer Dabbelt:
https://github.com/riscv/riscv-linux/commit/c94e267766d62bc9a669611c3d0c8ed5ea26569b
Erase/Read/Write operations are verified on HiFive Unleashed board using mtd and
flash utils (v1.5.2):
1. mtd_debug : Options available are : erase/read/write.
2. flashcp : Single utility that erases flash, writes a file to flash and verifies the data back.
The changes are available under branch dev/sagark/spi-nor-v9 at
https://github.com/sagsifive/riscv-linux-hifive
Revision history:
V8<->V9:
-Rebased this series to mainline v5.3-rc8
-Corrected number of sectors in the spi nor id table for is25wp256 device as suggested in the review.
-The lock/unlock scheme in the V8 version of this series needs to have a more generic approach.
These protection scheme patches are not included in this series, will submit those separately.
V7<->V8:
-Rebased this series on mainline v5.3-rc4.
-Removed remaining func_reg reference from issi_lock as updating OTP region was dropped as part of V6.
-Updated Reviewed-By tags to 1st and 2nd patch.
V6<->V7:
-Incorporated review comments from Vignesh.
-Used post bfpt fixup hook as suggested by Vignesh.
-Introduce SPI_NOR_HAS_BP3 to identify whether the flash has 4th bit protect bit.
-Prefix generic flash access functions with spi_nor_xxxx.
V5<->V6:
-Incorporated review comments from Vignesh.
-Set addr width based on device size and if SPI_NOR_4B_OPCODES is set.
-Added 4th block protect identifier (SPI_NOR_HAS_BP3) to flash_info structure
-Changed flash_info: flag from u16 to u32 to accommodate SPI_NOR_HAS_BP3
-Prefix newly added function with spi_nor_xxx.
-Dropped write_fr function, as updating OTP bit's present in function register doesn't seem to be a good idea.
-Set lock/unlock schemes based on whether the ISSI device has locking support and BP3 bit present.
V4<->V5:
-Rebased to linux version v5.2-rc1.
-Updated heading of this cover letter with sub-system, instead of just plain "add support for is25wp256..."
V3<->V4:
-Extracted comman code and renamed few stm functions so that it can be reused for issi lock implementation.
-Added function's to read and write FR register, for selecting Top/Bottom area.
V2<->V3:
-Rebased patch to mainline v5.1 from earlier v5.1-rc5.
-Updated commit messages, and cover letter with reference to git URL and author information.
-Deferred flash_lock mechanism and can go as separate patch.
V1<-> V2:
-Incorporated changes suggested by reviewers regarding patch/cover letter versioning, references of patch.
-Updated cover letter with description for flash operations verified with these changes.
-Add support for unlocking is25xxxxxx device.
-Add support for locking is25xxxxxx device.
v1:
-Add support for is25wp256 device.
Sagar Shrikant Kadam (2):
mtd: spi-nor: add support for is25wp256
mtd: spi-nor: fix nor->addr_width for is25wp256
drivers/mtd/spi-nor/spi-nor.c | 9 ++++++++-
include/linux/mtd/spi-nor.h | 1 +
2 files changed, 9 insertions(+), 1 deletion(-)
--
1.9.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v9 1/2] mtd: spi-nor: add support for is25wp256
2019-09-18 16:01 [PATCH v9 0/2] mtd: spi-nor: add support for is25wp256 spi-nor flash Sagar Shrikant Kadam
@ 2019-09-18 16:01 ` Sagar Shrikant Kadam
2019-09-18 16:01 ` [PATCH v9 2/2] mtd: spi-nor: fix nor->addr_width " Sagar Shrikant Kadam
2019-09-30 13:34 ` [PATCH v9 0/2] mtd: spi-nor: add support for is25wp256 spi-nor flash Sagar Kadam
2 siblings, 0 replies; 4+ messages in thread
From: Sagar Shrikant Kadam @ 2019-09-18 16:01 UTC (permalink / raw)
To: marek.vasut, tudor.ambarus, dwmw2, computersforpeace,
miquel.raynal, richard, vigneshr
Cc: aou, palmer, linux-kernel, linux-mtd, Sagar Shrikant Kadam,
paul.walmsley, linux-riscv
Update spi_nor_id table for is25wp256 (32MB) device from ISSI,
present on HiFive Unleashed dev board (Rev: A00).
Set method to enable quad mode for ISSI device in flash parameters
table.
Based on code originally written by Wesley Terpstra <wesley@sifive.com>
and/or Palmer Dabbelt <palmer@sifive.com>
https://github.com/riscv/riscv-linux/commit/c94e267766d62bc9a669611c3d0c8ed5ea26569b
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
---
drivers/mtd/spi-nor/spi-nor.c | 9 ++++++++-
include/linux/mtd/spi-nor.h | 1 +
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 654bdc4..003c1c7 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1946,7 +1946,10 @@ static int spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "is25wp128", INFO(0x9d7018, 0, 64 * 1024, 256,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-
+ { "is25wp256", INFO(0x9d7019, 0, 64 * 1024, 512,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+ SPI_NOR_4B_OPCODES)
+ },
/* Macronix */
{ "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1, SECT_4K) },
{ "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4, SECT_4K) },
@@ -3776,6 +3779,10 @@ static int spi_nor_init_params(struct spi_nor *nor,
case SNOR_MFR_ST:
case SNOR_MFR_MICRON:
break;
+ case SNOR_MFR_ISSI:
+ params->quad_enable = macronix_quad_enable;
+ break;
+
default:
/* Kept only for backward compatibility purpose. */
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 9f57cdf..5d6583e 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -21,6 +21,7 @@
#define SNOR_MFR_INTEL CFI_MFR_INTEL
#define SNOR_MFR_ST CFI_MFR_ST /* ST Micro */
#define SNOR_MFR_MICRON CFI_MFR_MICRON /* Micron */
+#define SNOR_MFR_ISSI 0x9d /* ISSI */
#define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX
#define SNOR_MFR_SPANSION CFI_MFR_AMD
#define SNOR_MFR_SST CFI_MFR_SST
--
1.9.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v9 2/2] mtd: spi-nor: fix nor->addr_width for is25wp256
2019-09-18 16:01 [PATCH v9 0/2] mtd: spi-nor: add support for is25wp256 spi-nor flash Sagar Shrikant Kadam
2019-09-18 16:01 ` [PATCH v9 1/2] mtd: spi-nor: add support for is25wp256 Sagar Shrikant Kadam
@ 2019-09-18 16:01 ` Sagar Shrikant Kadam
2019-09-30 13:34 ` [PATCH v9 0/2] mtd: spi-nor: add support for is25wp256 spi-nor flash Sagar Kadam
2 siblings, 0 replies; 4+ messages in thread
From: Sagar Shrikant Kadam @ 2019-09-18 16:01 UTC (permalink / raw)
To: marek.vasut, tudor.ambarus, dwmw2, computersforpeace,
miquel.raynal, richard, vigneshr
Cc: aou, palmer, linux-kernel, linux-mtd, Sagar Shrikant Kadam,
paul.walmsley, linux-riscv
Use the post bfpt fixup hook for the is25wp256 device as done for
is25lp256 device to overwrite the address width advertised by BFPT.
For instance the standard devices eg: IS25WP256D-JMLE where J stands
for "standard" does not support SFDP.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
---
drivers/mtd/spi-nor/spi-nor.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 003c1c7..75e8560 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1949,7 +1949,7 @@ static int spi_nor_spansion_clear_sr_bp(struct spi_nor *nor)
{ "is25wp256", INFO(0x9d7019, 0, 64 * 1024, 512,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_4B_OPCODES)
- },
+ .fixups = &is25lp256_fixups },
/* Macronix */
{ "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1, SECT_4K) },
{ "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4, SECT_4K) },
--
1.9.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v9 0/2] mtd: spi-nor: add support for is25wp256 spi-nor flash
2019-09-18 16:01 [PATCH v9 0/2] mtd: spi-nor: add support for is25wp256 spi-nor flash Sagar Shrikant Kadam
2019-09-18 16:01 ` [PATCH v9 1/2] mtd: spi-nor: add support for is25wp256 Sagar Shrikant Kadam
2019-09-18 16:01 ` [PATCH v9 2/2] mtd: spi-nor: fix nor->addr_width " Sagar Shrikant Kadam
@ 2019-09-30 13:34 ` Sagar Kadam
2 siblings, 0 replies; 4+ messages in thread
From: Sagar Kadam @ 2019-09-30 13:34 UTC (permalink / raw)
To: Marek Vasut, tudor.ambarus, David Woodhouse, Brian Norris,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra
Cc: Albert Ou, Palmer Dabbelt, Linux Kernel Mailing List, linux-mtd,
Paul Walmsley, linux-riscv
Hi,
On Wed, Sep 18, 2019 at 9:32 PM Sagar Shrikant Kadam
<sagar.kadam@sifive.com> wrote:
>
> The patch series adds basic support for 32MiB spi-nor is25wp256 present on HiFive
> Unleashed A00 board. The flash device gets BFPT_DWORD1_ADDRESS_BYTES_3_ONLY
> from BFPT table for address width, whereas the flash can support 4 byte
> address width, so the address width is configured by using the post bfpt
> fixup hook as done for is25lp256 device in
> commit cf580a924005 ("mtd: spi-nor: fix nor->addr_width when its value
> configured from SFDP does not match the actual width")
>
> Patches are based on original work done by Wesley Terpstra and/or
> Palmer Dabbelt:
> https://github.com/riscv/riscv-linux/commit/c94e267766d62bc9a669611c3d0c8ed5ea26569b
>
> Erase/Read/Write operations are verified on HiFive Unleashed board using mtd and
> flash utils (v1.5.2):
> 1. mtd_debug : Options available are : erase/read/write.
> 2. flashcp : Single utility that erases flash, writes a file to flash and verifies the data back.
>
> The changes are available under branch dev/sagark/spi-nor-v9 at
> https://github.com/sagsifive/riscv-linux-hifive
>
> Revision history:
> V8<->V9:
> -Rebased this series to mainline v5.3-rc8
> -Corrected number of sectors in the spi nor id table for is25wp256 device as suggested in the review.
> -The lock/unlock scheme in the V8 version of this series needs to have a more generic approach.
> These protection scheme patches are not included in this series, will submit those separately.
>
A gentle reminder!!
Any comments on this series?
Thanks & BR,
Sagar Kadam
> V7<->V8:
> -Rebased this series on mainline v5.3-rc4.
> -Removed remaining func_reg reference from issi_lock as updating OTP region was dropped as part of V6.
> -Updated Reviewed-By tags to 1st and 2nd patch.
>
> V6<->V7:
> -Incorporated review comments from Vignesh.
> -Used post bfpt fixup hook as suggested by Vignesh.
> -Introduce SPI_NOR_HAS_BP3 to identify whether the flash has 4th bit protect bit.
> -Prefix generic flash access functions with spi_nor_xxxx.
>
> V5<->V6:
> -Incorporated review comments from Vignesh.
> -Set addr width based on device size and if SPI_NOR_4B_OPCODES is set.
> -Added 4th block protect identifier (SPI_NOR_HAS_BP3) to flash_info structure
> -Changed flash_info: flag from u16 to u32 to accommodate SPI_NOR_HAS_BP3
> -Prefix newly added function with spi_nor_xxx.
> -Dropped write_fr function, as updating OTP bit's present in function register doesn't seem to be a good idea.
> -Set lock/unlock schemes based on whether the ISSI device has locking support and BP3 bit present.
>
> V4<->V5:
> -Rebased to linux version v5.2-rc1.
> -Updated heading of this cover letter with sub-system, instead of just plain "add support for is25wp256..."
>
> V3<->V4:
> -Extracted comman code and renamed few stm functions so that it can be reused for issi lock implementation.
> -Added function's to read and write FR register, for selecting Top/Bottom area.
>
> V2<->V3:
> -Rebased patch to mainline v5.1 from earlier v5.1-rc5.
> -Updated commit messages, and cover letter with reference to git URL and author information.
> -Deferred flash_lock mechanism and can go as separate patch.
>
> V1<-> V2:
> -Incorporated changes suggested by reviewers regarding patch/cover letter versioning, references of patch.
> -Updated cover letter with description for flash operations verified with these changes.
> -Add support for unlocking is25xxxxxx device.
> -Add support for locking is25xxxxxx device.
>
> v1:
> -Add support for is25wp256 device.
>
> Sagar Shrikant Kadam (2):
> mtd: spi-nor: add support for is25wp256
> mtd: spi-nor: fix nor->addr_width for is25wp256
>
> drivers/mtd/spi-nor/spi-nor.c | 9 ++++++++-
> include/linux/mtd/spi-nor.h | 1 +
> 2 files changed, 9 insertions(+), 1 deletion(-)
>
> --
> 1.9.1
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2019-09-30 13:34 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-09-18 16:01 [PATCH v9 0/2] mtd: spi-nor: add support for is25wp256 spi-nor flash Sagar Shrikant Kadam
2019-09-18 16:01 ` [PATCH v9 1/2] mtd: spi-nor: add support for is25wp256 Sagar Shrikant Kadam
2019-09-18 16:01 ` [PATCH v9 2/2] mtd: spi-nor: fix nor->addr_width " Sagar Shrikant Kadam
2019-09-30 13:34 ` [PATCH v9 0/2] mtd: spi-nor: add support for is25wp256 spi-nor flash Sagar Kadam
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).