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From: Yash Shah <yash.shah@sifive.com>
To: paul.walmsley@sifive.com, palmer@dabbelt.com, robh+dt@kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, sachin.ghadi@sifive.com
Cc: aou@eecs.berkeley.edu, anup@brainfault.org,
	lollivier@baylibre.com, green.wan@sifive.com,
	atish.patra@wdc.com, Yash Shah <yash.shah@sifive.com>,
	alistair.francis@wdc.com, deepa.kernel@gmail.com,
	bmeng.cn@gmail.com
Subject: [PATCH 1/3] riscv: defconfig, Kconfig: enable CPU power management
Date: Tue, 16 Jun 2020 17:31:02 +0530
Message-ID: <1592308864-30205-2-git-send-email-yash.shah@sifive.com> (raw)
In-Reply-To: <1592308864-30205-1-git-send-email-yash.shah@sifive.com>

Enable CPUFreq and CPUIdle for RISC-V systems to be configured with
Kconfig, and compile the kernel code to support it by default. This
will be used to support dynamic CPU frequency switching for the HiFive
Unleashed board, along with any future RISC-V boards that support
CPU power management.

Signed-off-by: Yash Shah <yash.shah@sifive.com>
---
 arch/riscv/Kconfig           | 8 ++++++++
 arch/riscv/configs/defconfig | 5 +++++
 2 files changed, 13 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index a31e1a4..1c8443e 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -381,6 +381,14 @@ endchoice
 
 endmenu
 
+menu "CPU Power Management"
+
+source "drivers/cpuidle/Kconfig"
+
+source "drivers/cpufreq/Kconfig"
+
+endmenu
+
 menu "Power management options"
 
 source "kernel/power/Kconfig"
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 4da4886..58f4bce 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -17,6 +17,11 @@ CONFIG_BPF_SYSCALL=y
 CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_VIRT=y
 CONFIG_SMP=y
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
+CONFIG_CPUFREQ_DT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_NET=y
-- 
2.7.4



  reply index

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-16 12:01 [PATCH 0/3] Dynamic CPU frequency switching for the HiFive Yash Shah
2020-06-16 12:01 ` Yash Shah [this message]
2020-06-16 12:01 ` [PATCH 2/3] riscv: dts: fu540-c000: define hart clocks Yash Shah
2020-06-16 12:01 ` [PATCH 3/3] riscv: dts: HiFive Unleashed: define a default set of CPU OPPs Yash Shah
2020-06-29  9:30 ` [PATCH 0/3] Dynamic CPU frequency switching for the HiFive Greentime Hu
2020-07-01 10:40 ` Andreas Schwab
2020-07-01 12:04   ` David Abdurachmanov
2020-07-03  5:53     ` Yash Shah
2020-07-06  8:15       ` Andreas Schwab
2020-07-09 20:48         ` Palmer Dabbelt
2020-07-08 12:06   ` Yash Shah

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