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Sat, 20 Oct 2018 06:50:39 -0700 (PDT) From: Paul Walmsley To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 2/3] dt-bindings: clk: add documentation for the SiFive PRCI driver Date: Sat, 20 Oct 2018 06:50:23 -0700 Message-Id: <20181020135024.28573-3-paul.walmsley@sifive.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181020135024.28573-1-paul.walmsley@sifive.com> References: <20181020135024.28573-1-paul.walmsley@sifive.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181020_065051_401937_EF2EDACD X-CRM114-Status: GOOD ( 14.51 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Paul Walmsley , Stephen Boyd , Megan Wachs , Michael Turquette , Palmer Dabbelt , linux-kernel@vger.kernel.org, Rob Herring , Paul Walmsley , linux-riscv@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org Message-ID: <20181020135023.eOYXALkyqJu4gj7yjAQoXgtsBcewxvbBSK4j8YINlI4@z> Add DT binding documentation for the Linux driver for the SiFive PRCI clock & reset control IP block, as found on the SiFive FU540 chip. Cc: Michael Turquette Cc: Stephen Boyd Cc: Rob Herring Cc: Mark Rutland Cc: Palmer Dabbelt Cc: Megan Wachs Cc: linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Paul Walmsley Signed-off-by: Paul Walmsley --- v2: remove out-of-date example, add documentation for the compatible string and for the required PCB clock nodes .../bindings/clock/sifive/fu540-prci.txt | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt diff --git a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt new file mode 100644 index 000000000000..d7c1e83fa5ed --- /dev/null +++ b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt @@ -0,0 +1,43 @@ +SiFive FU540 PRCI bindings + +On the FU540 family of SoCs, most system-wide clock and reset integration +is via the PRCI IP block. + +Required properties: +- compatible: Should be "sifive,-prci". As of the time this + file was written, only one value is supported: + "sifive,fu540-c000-prci0" +- reg: Should describe the PRCI's register target physical address region +- clocks: Should point to the hfclk device tree node and the rtcclk + device tree node. The RTC clock here is not a time-of-day clock, + but is instead a high-stability clock source for system timers + and cycle counters. +- #clock-cells: Should be <1> + +The clock consumer should specify the desired clock via the clock ID +macros defined in include/linux/clk/sifive-fu540-prci.h. These macros +begin with PRCI_CLK_. + +The hfclk and rtcclk nodes are required, and represent physical +crystals or resonators located on the PCB. + +Examples: + +hfclk: hfclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <33333333>; + clock-output-names = "hfclk"; +}; +rtcclk: rtcclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <1000000>; + clock-output-names = "rtcclk"; +}; +prci0: prci@10000000 { + compatible = "sifive,fu540-c000-prci0"; + reg = <0x0 0x10000000 0x0 0x1000>; + clocks = <&hfclk>, <&rtcclk>; + #clock-cells = <1>; +}; -- 2.19.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv