From: anup@brainfault.org (Anup Patel) To: linux-riscv@lists.infradead.org Subject: [PATCH 0/4] IRQ affinity support in PLIC driver Date: Mon, 22 Oct 2018 17:15:13 +0530 [thread overview] Message-ID: <20181022114517.22748-1-anup@brainfault.org> (raw) This patchset primarily adds IRQ affinity support in PLIC driver and other improvements. The patchset gives mechanism for explicitly routing external interrupts to particular CPUs using smp_affinity attribute of each Linux IRQs. Also, we can now use IRQ balancer from kernel-space or user-space. The patchset is tested on QEMU virt machine. It is based on Linux-4.19-rc2 and can be found at riscv_plic_irq_affinity_v1 branch of: https://github.com/avpatel/linux.git Anup Patel (4): irqchip: sifive-plic: Pre-compute context hart base and enable base irqchip: sifive-plic: More flexible plic_irq_toggle() irqchip: sifive-plic: Differentiate between PLIC handler and context irqchip: sifive-plic: Implement irq_set_affinity() for SMP host drivers/irqchip/irq-sifive-plic.c | 164 ++++++++++++++++++------------ 1 file changed, 99 insertions(+), 65 deletions(-) -- 2.17.1
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From: Anup Patel <anup@brainfault.org> To: Palmer Dabbelt <palmer@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>, Marc Zyngier <marc.zyngier@arm.com> Cc: Christoph Hellwig <hch@infradead.org>, Atish Patra <atish.patra@wdc.com>, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel <anup@brainfault.org> Subject: [PATCH 0/4] IRQ affinity support in PLIC driver Date: Mon, 22 Oct 2018 17:15:13 +0530 [thread overview] Message-ID: <20181022114517.22748-1-anup@brainfault.org> (raw) Message-ID: <20181022114513.BGPyU_49towu8zTIHXk6W8klLQNpdz9ZJ-N-IPXScEI@z> (raw) This patchset primarily adds IRQ affinity support in PLIC driver and other improvements. The patchset gives mechanism for explicitly routing external interrupts to particular CPUs using smp_affinity attribute of each Linux IRQs. Also, we can now use IRQ balancer from kernel-space or user-space. The patchset is tested on QEMU virt machine. It is based on Linux-4.19-rc2 and can be found at riscv_plic_irq_affinity_v1 branch of: https://github.com/avpatel/linux.git Anup Patel (4): irqchip: sifive-plic: Pre-compute context hart base and enable base irqchip: sifive-plic: More flexible plic_irq_toggle() irqchip: sifive-plic: Differentiate between PLIC handler and context irqchip: sifive-plic: Implement irq_set_affinity() for SMP host drivers/irqchip/irq-sifive-plic.c | 164 ++++++++++++++++++------------ 1 file changed, 99 insertions(+), 65 deletions(-) -- 2.17.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next reply other threads:[~2018-10-22 11:45 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-10-22 11:45 Anup Patel [this message] 2018-10-22 11:45 ` [PATCH 0/4] IRQ affinity support in PLIC driver Anup Patel 2018-10-22 11:45 ` [PATCH 1/4] irqchip: sifive-plic: Pre-compute context hart base and enable base Anup Patel 2018-10-22 11:45 ` Anup Patel 2018-11-09 8:42 ` Christoph Hellwig 2018-11-09 8:42 ` Christoph Hellwig 2018-11-12 4:27 ` Anup Patel 2018-11-12 4:27 ` Anup Patel 2018-10-22 11:45 ` [PATCH 2/4] irqchip: sifive-plic: More flexible plic_irq_toggle() Anup Patel 2018-10-22 11:45 ` Anup Patel 2018-11-09 8:43 ` Christoph Hellwig 2018-11-09 8:43 ` Christoph Hellwig 2018-11-12 12:33 ` Anup Patel 2018-11-12 12:33 ` Anup Patel 2018-10-22 11:45 ` [PATCH 3/4] irqchip: sifive-plic: Differentiate between PLIC handler and context Anup Patel 2018-10-22 11:45 ` Anup Patel 2018-10-22 11:45 ` [PATCH 4/4] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host Anup Patel 2018-10-22 11:45 ` Anup Patel
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