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[209.85.208.172]) by smtp.gmail.com with ESMTPSA id n195-v6sm1511087lfb.26.2018.10.25.18.13.02 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Oct 2018 18:13:02 -0700 (PDT) Received: by mail-lj1-f172.google.com with SMTP id j4-v6so9972298ljc.12 for ; Thu, 25 Oct 2018 18:13:02 -0700 (PDT) X-Received: by 2002:a2e:9584:: with SMTP id w4-v6mr915704ljh.118.1540516382096; Thu, 25 Oct 2018 18:13:02 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Linus Torvalds Date: Thu, 25 Oct 2018 18:12:46 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [GIT PULL] RISC-V Patches for the 4.20 Merge Window, Part 1 To: palmer@sifive.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181025_181317_331482_BB2FA182 X-CRM114-Status: GOOD ( 11.95 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Greg KH , linux-riscv@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org Message-ID: <20181026011246.XjLoUQnL9l-PAGHbHkmMvBTVufGlk3LCtWPz4kflnek@z> On Wed, Oct 24, 2018 at 1:42 PM Palmer Dabbelt wrote: > > I'm pretty sure this is our largest patch set since the original kernel > contribution, and it's certainly the one with the most contributors. > While I don't have anything else I know I'm going to submit for the > merge window, I would be somewhat surprised if I didn't screw anything > up. So I'm not entirely sure this is a screw-up, but it does have some signs of being one: > lib: Add umoddi3 and udivmoddi4 of GCC library routines We have *actively* tried to avoid needing umoddi3 and friends, and have so far succceeded in doing that across many different architectures, and many many years. And when we _have_ added it, we've added it as architecture-specific optimized routines when people really need it. The reason to avoid a full 64-by-64 divide is that (a) it is really expensive (b) code that needs it is almost always actually wrong Almost always, the 64-bit divide turns out to be entirely pointless, and the code can be written as a (much cheaper) 64-by-32 divide instead using the functions in instead. Does RISC-V _really_ need that disgusting full 64-bit divide, or was the addition of that simply a "we didn't know better, and didn't realize just how expensive and wrong it is"? I've pulled this, but I really _really_ hope that I will get a second pull request that gets rid of this again, and fixes whatever RISC-V code that triggered this to just do not do an insane full 64-bit divide on a 32-bit architecture. Linus _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv