From mboxrd@z Thu Jan 1 00:00:00 1970 From: broonie@kernel.org (Mark Brown) Date: Tue, 13 Nov 2018 14:38:22 -0800 Subject: [RFC PATCH] spi: add driver for the SiFive SPI controller In-Reply-To: References: <20181112142736.15009-1-kernel@esmil.dk> <20181113183527.GG2089@sirena.org.uk> Message-ID: <20181113223822.GN2089@sirena.org.uk> To: linux-riscv@lists.infradead.org List-Id: linux-riscv.lists.infradead.org On Tue, Nov 13, 2018 at 08:48:43PM +0100, Emil Renner Berthing wrote: > On Tue, 13 Nov 2018 at 19:35, Mark Brown wrote: > > On Mon, Nov 12, 2018 at 03:27:36PM +0100, Emil Renner Berthing wrote: > > > I know the discussions about the sifive devicetree compatible > > > strings haven't come to a conclusion, so I'm sending this as > > > an RFC to get some feedback on the rest of the code. > > I've not seen any of these discussions or earlier versions of this > > driver so I've no idea what's going on here :( > No, sorry. This has been discussed on linux-riscv for other drivers > like the uart. See my last answer. > > > +Optional properties: > > > +- sifive,fifo-depth : Depth of hardware queues; defaults to 8 > > > +- sifive,max-bits-per-word : Maximum bits per word; defaults to 8 > > If the hardware isn't fixed yet making these enumerable from the > > hardware would be good... > Agreed, but unfortunately this is already in the FU540-C000 chip on > the HiFive Unleashed board sold by SiFive. Pick an unused register you can read safely and define that value to the default :) > > > +/* for consistency we need this symbol */ > > > +#ifdef REG_FMT > > > +#undef REG_FMT > > > +#endif > > We do? For consistency with what? > Below all the register offsets are defined as > REG_. This is is a pattern I > copied from other drivers, but here we have a > register called "fmt" - hence REG_FMT. > If you have a better pattern that doesn't clash > with REG_FMT please let me know. You shouldn't be using such generic names for your internal identifiers, add a prefix to everything. -------------- next part -------------- A non-text attachment was scrubbed... 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User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181113_143844_670406_1D5E39DA X-CRM114-Status: GOOD ( 20.37 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Palmer Dabbelt , Linux Kernel Mailing List , linux-spi@vger.kernel.org, Rob Herring , linux-riscv@lists.infradead.org Content-Type: multipart/mixed; boundary="===============8805375282602284790==" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org Message-ID: <20181113223822.iHZe-1CyR3V-RTDk1k_1oOMtX8ZxRYdmroQBi-OPrUE@z> --===============8805375282602284790== Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="HxQt9wRz9wbL5Edg" Content-Disposition: inline --HxQt9wRz9wbL5Edg Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Nov 13, 2018 at 08:48:43PM +0100, Emil Renner Berthing wrote: > On Tue, 13 Nov 2018 at 19:35, Mark Brown wrote: > > On Mon, Nov 12, 2018 at 03:27:36PM +0100, Emil Renner Berthing wrote: > > > I know the discussions about the sifive devicetree compatible > > > strings haven't come to a conclusion, so I'm sending this as > > > an RFC to get some feedback on the rest of the code. > > I've not seen any of these discussions or earlier versions of this > > driver so I've no idea what's going on here :( > No, sorry. This has been discussed on linux-riscv for other drivers > like the uart. See my last answer. > > > +Optional properties: > > > +- sifive,fifo-depth : Depth of hardware queues; defaults to 8 > > > +- sifive,max-bits-per-word : Maximum bits per word; defaults to 8 > > If the hardware isn't fixed yet making these enumerable from the > > hardware would be good... > Agreed, but unfortunately this is already in the FU540-C000 chip on > the HiFive Unleashed board sold by SiFive. Pick an unused register you can read safely and define that value to the default :) > > > +/* for consistency we need this symbol */ > > > +#ifdef REG_FMT > > > +#undef REG_FMT > > > +#endif > > We do? For consistency with what? > Below all the register offsets are defined as > REG_. This is is a pattern I > copied from other drivers, but here we have a > register called "fmt" - hence REG_FMT. > If you have a better pattern that doesn't clash > with REG_FMT please let me know. You shouldn't be using such generic names for your internal identifiers, add a prefix to everything. --HxQt9wRz9wbL5Edg Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAlvrUlsACgkQJNaLcl1U h9Dh5Qf/VUw8Ra+KYUjDwFvhBTQ/WLhdXFh/koVtPuDeo/mLnyehCCyuEv/oSrll 0udob665plGSH3CYnEz4V9b5tmNdSJxp07aKox6x89MFVLEX7uvGcKBn3H5fWEs2 DVuySHjWrLqii2wO0CMIfOl36cv98tXKrY266JrfjDcOf8hCb/anRAo3kVpWjWb4 Xsu1swOFX21MIYzQvoSveObgSveQq6uKuvBZMlcBFvCMUVY3Nmz7txmmJybH/2Dt 1i2G85fW+vNQCnQMziZGIEcrZHimx+xUeW3gofnpedoiYMAFcJ90il6N2tGal4HV 791AgaI0CuowfiED5NUNrWxpANZX9A== =XS6h -----END PGP SIGNATURE----- --HxQt9wRz9wbL5Edg-- --===============8805375282602284790== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv --===============8805375282602284790==--