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Received: from foss.arm.com ([217.140.101.70]) by casper.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gP3wu-0006oZ-47; Tue, 20 Nov 2018 11:12:09 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1906515BE; Tue, 20 Nov 2018 03:11:55 -0800 (PST) Received: from e107155-lin (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B2BB73F575; Tue, 20 Nov 2018 03:11:52 -0800 (PST) Date: Tue, 20 Nov 2018 11:11:46 +0000 From: Sudeep Holla To: Jeffrey Hugo Subject: Re: [RFC 0/3] Unify CPU topology across ARM64 & RISC-V Message-ID: <20181120111146.GA6497@e107155-lin> References: <1541728209-3224-1-git-send-email-atish.patra@wdc.com> <07d92dd4-f943-47ee-e168-46bfaf4ed755@codeaurora.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <07d92dd4-f943-47ee-e168-46bfaf4ed755@codeaurora.org> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181120_111208_303610_B38B8C9A X-CRM114-Status: GOOD ( 13.62 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Damien.LeMoal@wdc.com, juri.lelli@arm.com, anup@brainfault.org, palmer@sifive.com, linux-kernel@vger.kernel.org, jeremy.linton@arm.com, Atish Patra , robh+dt@kernel.org, mick@ics.forth.gr, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org Message-ID: <20181120111146.x4mlVJsRMgwjt7VLnaq-nJ2ce48jyVxJlxUCJh9iK4A@z> On Thu, Nov 15, 2018 at 11:31:33AM -0700, Jeffrey Hugo wrote: [...] > > I was interested in testing these on QDF2400, an ARM64 platform, since this > series touches core ARM64 code and I'd hate to see a regression. However, I > can't figure out what baseline to use to apply these. Different patches > cause different conflicts of a variety of baselines I attempted. > Good to know that we can test DT configuration on QDF2400. I always assumed it's ACPI only. > What are these intended to apply to? > The series alone may not get the package/socket ids correct on QDF2400. I have not yet added support for the same as I wanted to get the initial feedback on DT bindings. The movement of DT binding and corresponding code should not regress and you should be able to validate only that part. -- Regards, Sudeep _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv