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Tue, 20 Nov 2018 15:28:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1542727700; bh=m0p22JJsxKd1q1uJL2YmVOjRbHzUu7zoN5ew8++y+/4=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=JAIvCevJmrHjMXj8BdPXVHS/bVRpbtJsXKq1GVCKoHj4mn/j+ow3kWXvVLl4nfohk nGxgN4NtSQMLluzPLxiVLNcMe7raLg2wijZ0uq0sGAZ2eI9uAQyznjaL+A9AJiOLXx O9OVQEDPAxpaxlCTo3hlI4Dq7+brXM1EyGbPsi4E= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0D04B6020B Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jhugo@codeaurora.org Subject: Re: [RFC 0/3] Unify CPU topology across ARM64 & RISC-V To: Sudeep Holla References: <1541728209-3224-1-git-send-email-atish.patra@wdc.com> <07d92dd4-f943-47ee-e168-46bfaf4ed755@codeaurora.org> <20181120111146.GA6497@e107155-lin> From: Jeffrey Hugo Message-ID: <35b92f83-dbbf-fad2-561f-49b0933ffe19@codeaurora.org> Date: Tue, 20 Nov 2018 08:28:18 -0700 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.3.0 MIME-Version: 1.0 In-Reply-To: <20181120111146.GA6497@e107155-lin> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181120_072831_672158_43D8F289 X-CRM114-Status: GOOD ( 19.24 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Damien.LeMoal@wdc.com, juri.lelli@arm.com, anup@brainfault.org, palmer@sifive.com, linux-kernel@vger.kernel.org, jeremy.linton@arm.com, Atish Patra , robh+dt@kernel.org, mick@ics.forth.gr, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org Message-ID: <20181120152818.zd4Vz2mNt4nHbe95XyH0xaQo9zC7AKqGv9jeonbY3Ko@z> On 11/20/2018 4:11 AM, Sudeep Holla wrote: > On Thu, Nov 15, 2018 at 11:31:33AM -0700, Jeffrey Hugo wrote: > > [...] > >> >> I was interested in testing these on QDF2400, an ARM64 platform, since this >> series touches core ARM64 code and I'd hate to see a regression. However, I >> can't figure out what baseline to use to apply these. Different patches >> cause different conflicts of a variety of baselines I attempted. >> > > Good to know that we can test DT configuration on QDF2400. I always assumed > it's ACPI only. It is ACPI only in the production configuration. I suppose we could hack things up to do basic DT sanity, but I expect it would be nasty and non-trivial. > >> What are these intended to apply to? >> > > The series alone may not get the package/socket ids correct on QDF2400. > I have not yet added support for the same as I wanted to get the initial > feedback on DT bindings. The movement of DT binding and corresponding > code should not regress and you should be able to validate only that > part. > On a cursory glance, it looks like some of the reorganized code would also be used in the ACPI path (things that are common between DT and ACPI). I do not expect problems, but I still feel its prudent to do a sanity check on actual hardware. -- Jeffrey Hugo Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv